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參數(shù)資料
| 型號： | SA9504 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 衰減器 |
| 英文描述： | Dual-band, PCSCDMA/AMPS LNA and downconverter mixers |
| 中文描述： | RF/MICROWAVE DOWN CONVERTER |
| 封裝： | PLASTIC LOW PROFILE QUAD FLAT, SOT401-1, 32PIN |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 223K |
| 代理商： | SA9504 |
Philips Semiconductors
Preliminary specification
SA9504
Dual-band, PCS(CDMA)/AMPS
LNA and downconverter mixers
1999 Oct 28
5
MODE SELECT LOGIC AND
DC CHARACTERISTICS
The SA9504 chip has several modes of operation for which the
selection logic is defined in the following table. Different mode
selections require different portions of the circuit to be active. Modes
from unlisted combinations of logic pins, are not valid.
POWER-UP PROCEDURE
In order for the SA9504 to function correctly as given in Table 1, the
circuit must be reset on power-up as follows:
To apply a reset, both S0 and S1 should be held HIGH
simultaneously (hold time 100 ns minimum), and then released to a
LOW state upon initially powering up the device.
Table 1.
Mode logic definition for LNA and Downconverter mixers
(Tx) LO
BUFFER
OUTPUT
LOGIC INPUT PINS
MODES
(Tx) LO
BUFFER
LO FREQ.
DOUBLER
POWER
DOWN
1
S0 = S1
PCS/CEL
LO X2
ENABLE
(Tx) LO
ENABLE
PCS (CDMA)
1
PCS1
On
2 GHz
Off
0
1
0
1
2
PCS1 Idle
Off
—
Off
0
1
0
0
3
PCS2
On
2 GHz
On
0
1
1
1
4
PCS2 Idle
Off
—
On
0
1
1
0
Cellular FM
5
FM
On
1 GHz
Off
0
0
0
1
6
FM Idle
Off
—
Off
0
0
0
0
Power Down
7
Sleep
1
x
x
Off
1
x
x
x
NOTES:
x = Don’t care
1. The device will be in the Power Down mode (sleep) when both control lines S0 and S1 are held HIGH simultaneously.
DC CHARACTERISTICS
V
CC
= 3.3 V; T
amb
= +25
°
C
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
MIN
TYP
MAX
Power supply
V
CC
I
CC
Supply voltage
all modes
2.7
2.85
3.3
V
Supply current
PCS1 mode
32.5
37.4
mA
PCS1 Idle mode
21.9
25.2
mA
PCS2 mode
36.9
42.4
mA
PCS2 Idle mode
26.3
30.2
mA
FM mode
22.3
25.6
mA
FM Idle mode
11.8
13.8
mA
μ
A
I
CC(PD)
Logic inputs (LO_ENABLE, PCS/CEL, S0, S1, LO_X2_EN pins)
Supply current in power down
Sleep
1
50
V
IH
V
IL
I
IH
I
IL
HIGH level input voltage range
At logic 1
0.5V
CC
–0.3
V
CC
+0.3
0.2V
CC
5
V
LOW level input voltage range
At logic 0
V
μ
A
μ
A
HIGH level input bias current
pins at V
CC
– 0.4 V
pins at 0.4 V
–5
0
LOW level input bias current
–5
0
5
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