參數(shù)資料
型號: SAA4960
廠商: NXP SEMICONDUCTORS
元件分類: 信號分離
英文描述: Integrated PAL comb filter
中文描述: Y/C SEPARATOR IC, PDIP28
封裝: 0.600 INCH, PLASTIC, DIP-28
文件頁數(shù): 5/24頁
文件大?。?/td> 194K
代理商: SAA4960
1996 Oct 15
5
Philips Semiconductors
Preliminary specification
Integrated PAL comb filter
SAA4960
FUNCTIONAL DESCRIPTION
Functional requirements
The PAL comb filter processes the video standards PAL B,
G and H. PAL D and I signals can also be processed but
with the drawback of a slightly reduced bandwidth.
For SECAM and SVHS signals, the input signals can be
bypassed to the output without processing by selecting the
BYPASS-mode.
A sync separation circuit is incorporated to generate
control signals for the internal clock processing. With a
sync compression of up to 12 dB the sync separator works
properly (see Fig.4).
The IC is controlled via four pins:
1.
BYP forces the IC into the BYPASS-mode (comb filter
function off)
2.
SSYN defines whether the COMB-mode is entered
synchronously or not and defines the polarity of the
BYP pin
3.
FSCSW selects the reference frequency f
sc
or 2
×
f
sc
4.
LPFION enables the internal pre-filter.
It is possible to select the following modes of operation:
COMB-mode: Luminance and chrominance comb filter
function active if BYPASS-mode not active.
BYPASS-mode: Signal processing not active, all clocks
inactive, C
ext
(pin 10) is bypassed to C
O
(pin 12) and
Y
ext
/CVBS (pin 17) is bypassed to Y
O
(pin 14) and
CVBSO (pin 15). This mode is forced via BYP (pin 3).
If the stimulus of the mode is changed, the IC is following
the new mode after the stabilization time given in Table 1.
Table 1
Stabilization time after mode change
The mode change from BYPASS to COMB depends on
SSYN (pin 6) and can be asynchronous or synchronous
related to the vertical pulse. The mode change from
COMB to BYPASS is always performed asynchronously.
MODE CHANGE
MAXIMUM
STABILIZATION
TIME
COMB-mode to BYPASS-mode
BYPASS-mode to COMB-mode
1 line
1 field
Pin description
FSC (
PIN
1)
Input for the reference frequency f
sc
(see note 2 of Chapter
“Characteristics”) or 2
×
f
sc
. For SECAM standard signals
the best signal performance in BYPASS-mode is achieved
by switching the FSC input signal off externally.
BYP (
PIN
3)
Input signal that controls the operation mode. A low-pass
filter is added to the input for suppression of subcarrier
frequencies. Thus applications are supported where the
operation mode (COMB or BYPASS) is controlled by the
DC-level of the FSC input signal at pin 1. For those
applications the BYP input can be externally connected to
FSC (pin 1).
Depending on SSYN (pin 6) the function of BYP can be
adapted to a certain application with respect to the polarity
of the logic level and with respect to the behaviour when
entering the COMB-mode.
Dependent on SSYN the BYP input can be either inverted
or non-inverted with the function as shown in Table 2:
Table 2
Bypass function
Dependent on SSYN the behaviour when entering the
COMB-mode is different for the both selectable logic
polarities while the BYPASS-mode is always entered
asynchronously (immediately).
Table 3
Behaviour when entering the COMB-mode
The PLL and the clock processing are always stopped if
the selected level for BYPASS is applied to BYP
(independent of the vertical pulse).
SSYN
BYP
SELECTED MODE
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
COMB-mode
BYPASS-mode
BYPASS-mode
COMB-mode
SSYN
ENTERING COMB-MODE
LOW
HIGH
immediately if BYP = LOW
synchronized by vertical pulse if BYP = HIGH
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