參數(shù)資料
型號: SAA5249GP
廠商: NXP SEMICONDUCTORS
元件分類: 圖文
英文描述: Integrated VIP and Teletext with Background Memory Controller IVT1.1BMCX
中文描述: TELETEXT DECODER, PQFP64
封裝: PLASTIC, SOT-319, QFP-64
文件頁數(shù): 24/44頁
文件大小: 821K
代理商: SAA5249GP
1996 Nov 07
24
Philips Semiconductors
Preliminary specification
Integrated VIP and Teletext with
Background Memory Controller
SAA5249
Register maps
IVT1.1BMCX mode registers R0 to R11 are shown in Table 7. R0 to R10 are write only; R11 is read/write.
Register map (R3), for page requests, is shown in detail in Table 9.
Table 7
Register map (notes 1 to 5)
REGISTER
D7
D6
D5
D4
D3
D2
D1
D0
Adv. control 0
X24 POS FREE
RUN PLL
AUTO
ODD/
EVEN
DISABLE
HDR
ROLL
DISPLAY
SRATUS
ROW
ONLY
DEW/
FULL
FIELD
TB
DISABLE
ODD/
EVEN
R11/R11B
SELECT
Mode
1
VCS TO
SCS
7 + P/
8-BIT
ACQ
ON/OFF
DISABLE
PKT 26
TCS
ON
T1
T0
Page
request
address
Page
request
data
2
START
COLUMN
SC2
PRD2
START
COLUMN
SC1
PRD1
START
COLUMN
SC0
PRD0
3
CLEAR
B.M.
PRD4
PRD3
BKGND
OUT
BKGND IN
COR OUT
COR IN
TEXT OUT TEXT IN
PON OUT PON IN
Display
control
(normal)
Display
control
(newsflash
/subtitle)
Display
mode
5
6
BKGND
OUT
BKGND IN
COR OUT
COR IN
TEXT OUT TEXT IN
PON OUT PON IN
7
STATUS
BTM
TOP
CURSOR
ON
CONCEA
L REVEAL
ON
A0
TOP/BTM
HALF
SINGLE
DOUBLE
HEIGHT
R3
BOX ON
24
BOX ON
1-23
BOX ON 0
CLEAR
MEM.
R4
R2
R1
R0
Cursor row
9
Cursor
column
Cursor data 11
Device
status
10
C5
C4
C3
C2
C1
C0
D7
D6
ROM VER
R4
D5
ROM
VER R3
D4
ROM VER
R2
D3
ROM VER
R1
D2
ROM
VER R0
D1
TEXT
SIGNAL
QUALITY
D0
VCS
SIGNAL
QUALITY
11B 625/525
SYNC
相關(guān)PDF資料
PDF描述
SAA5249 Integrated VIP and Teletext with Background Memory Controller IVT1.1BMCX
SAA5249P Integrated VIP and Teletext with Background Memory Controller IVT1.1BMCX
SAA5250 Interface for data acquisition and control for multi-standard teletext systems
SAA5250P Interface for data acquisition and control for multi-standard teletext systems
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