參數(shù)資料
型號: SAA5360
廠商: NXP Semiconductors N.V.
英文描述: Multi page intelligent teletext decoder
中文描述: 智能多頁圖文電視解碼器
文件頁數(shù): 9/28頁
文件大小: 158K
代理商: SAA5360
2005 Mar 09
9
Philips Semiconductors
Product specification
Multi page intelligent teletext decoder
SAA5360; SAA5361
6.2
Type SAA5361
SYMBOL
PIN
TYPE
DESCRIPTION
P2_7/PWM6
P3_0/ADC0
1
2
I/O
I/O
programmable bidirectional port 2: bit 7 or output bit 6 of the 6-bit PWM
programmable bidirectional port 3 with alternative functions: bit 0 or input 0 for the
software ADC facility
not connected
programmable bidirectional port 3 with alternative functions: bit 1 or input 1 for the
software ADC facility
programmable bidirectional port 3 with alternative functions: bit 2 or input 2 for the
software ADC facility
programmable bidirectional port 3 with alternative functions: bit 3 or input 3 for the
software ADC facility
not connected
address line 14
read control output to external data memory; active LOW
write control output to external data memory; active LOW
core ground
periphery ground
8 mA current sinking output for direct drive of LED
not connected
address line 7
I
2
C-bus serial clock input to non-volatile RAM
I
2
C-bus serial data input and output of non-volatile RAM
programmable bidirectional port 0 with alternative functions: bit 2 input and output
for general use
not connected
not connected
OTP programming voltage input; connect to ground
programmable bidirectional port 0 with alternative functions: bit 3 input and output
for general use
address line 6
programmable bidirectional port 0 with alternative functions: bit 4 input and output
for general use
not connected
address line 5
address line 4
8 mA current sinking output for direct drive of LED
programmable bidirectional port 0 with alternative functions: bit 7 input and output
for general use
analog ground
composite video input 0 selectable via SFR; a positive-going 1 V (p-p) input is
required and connected via a 100 nF capacitor
composite video input 1 selectable via SFR; a positive-going 1 V (p-p) input is
required and connected via a 100 nF capacitor
n.c.
P3_1/ADC1
3
4
O
I/O
P3_2/ADC2
5
I/O
P3_3/ADC3
6
I/O
n.c.
A14
RD
WR
V
SSC
V
SSP
P0_5
n.c.
A7
SCL_NVRAM
SDA_NVRAM
P0_2
7
8
9
10
11
12
13
14
15
16
17
18
O
O
O
O
-
-
I/O
I
O
I
I/O
I/O
n.c.
n.c.
VPE
P0_3
19
20
21
22
O
O
I
I/O
A6
P0_4
23
24
O
I/O
n.c.
A5
A4
P0_6
P0_7
25
26
27
28
29
I/O
O
O
I/O
I/O
V
SSA
CVBS0
30
31
-
I
CVBS1
32
I
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