參數資料
型號: SAA5491PS
廠商: NXP Semiconductors N.V.
英文描述: DPST MINIATURE POWER RELAY
中文描述: 經濟圖文電視和電視微控制器
文件頁數: 12/68頁
文件大?。?/td> 612K
代理商: SAA5491PS
1997 Jul 07
12
Philips Semiconductors
Preliminary specification
Economy teletext and TV microcontrollers
SAA5x9x family
7.3.6
14-
BIT
PWM DAC
One 14-bit DAC is available to allow direct control of
analog sections of the television. The 14-bit PWM is
controlled using Special Function Registers TDACL and
TDACH.
The output of the TPWM is a pulse of period 42.66
μ
s. The
7 most significant bits, TDACH.TD13
(MSB) to TDACH.TD8 and TDACL.TD7, alter the pulse
width between 0 and 42.33
μ
s, in much the same way as
in the 6-bit PWMs. The 7 least significant bits, TDACL.TD6
to TDACL.TD0 (LSB), extend certain pulses by a further
0.33
μ
s, e.g. if the 7 least significant bits are given the
value 01H, then 1 in 128 cycles is extended. If the 7 least
significant bits are given the value 02H, then
2 in 128 cycles is extended, and so forth.
The TPWM will not start to output a new value until after
writing a value to TDACH. Therefore, if the value is to be
changed, TDACL should be written to before TDACH.
7.3.6.1
TPWM High Byte Register (TDACH)
Table 5
TPWM High Byte Register (SFR address D3H)
Table 6
Description of TDACH bits
7.3.6.2
TPWM Low Byte Register (TDACL)
Table 7
TPWM Low Byte Register (SFR address D2H)
Table 8
Description of TDACL bits
7
6
5
4
3
2
1
0
PWE
TD13
TD12
TD11
TD10
TD9
TD8
BIT
SYMBOL
DESCRIPTION
7
PWE
If PWE is set to a logic 1, the TPWM is active and controls port line P2.0. If PWE is set
to a logic 0, the port pin is controlled by the corresponding bit in the port SFR.
Not used.
These 6-bits along with bit TD7 in the TDACL register control the pulse width period.
TD13 is the most significant bit.
6
5
4
3
2
1
0
TD13
TD12
TD11
TD10
TD9
TD8
7
6
5
4
3
2
1
0
TD7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
BIT
SYMBOL
DESCRIPTION
7
TD7
This bit is used with bits TD13 to TD8 in the TDACH register to control the pulse width
period.
These 7-bits extend certain pulses by a further 0.33
μ
s.
6 to 0
TD6 to TD0
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