2000 Feb 23
31
Philips Semiconductors
Preliminary specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA55xx
Fig.11 Indirect addressing of Auxiliary RAM.
handbook, full pagewidth
MBK958
SFR XRAMP = 00H
FFH
00H
SFR XRAMP = 01H
FFH
00H
0000H
00FFH
0100H
01FFH
SFR XRAMP = FEH
MOVX @ DPTR,A
MOVX A, @ DPTR
MOVX @ Ri,A
MOVX A, @ Ri
FFH
00H
SFR XRAMP = FFH
FFH
00H
FE00H
FEFFH
FF00H
FFFFH
9
POWER-ON RESET
An automatic reset can be obtained when V
DD
is turned on
by connecting the RESET pin to V
DDP
through a 10
μ
F
capacitor, providing the V
DD
rise time does not exceed
1 ms, and the oscillator start-up time does not exceed
10 ms.
To ensure correct initialisation, the RESET pin must be
held HIGH long enough for the oscillator to settle following
power-up, usually a few milli-seconds. Once the oscillator
is stable, a further 24 clocks are required to generate the
reset (two machine cycles of the microcontroller). Once
the above reset condition has been detected an internal
reset signal is triggered which remains active for
2048 clock cycles.