1997 May 16
5
Philips Semiconductors
Preliminary specification
Chinese Character System Teletext
(CCST) decoder
SAA5700
RA4
V
SS1
n.c.
V
DDD1
RA5
RA6
RA7
n.c.
RA8
RA9
RAS
n.c.
WE
i.c.
RD0
RD1
V
DDD2
V
SS2
n.c.
RD2
RD3
CAS
RA10
RD7
RD6
RD5
RD4
RESET
DDA
SCL
SDA
DCL
OSCIN
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
O
bit 4 of address to DRAM, ROM and IC
0 V power supply digital; connected internally to V
SS2
and V
SS3
not connected
+5 V power supply digital; connected internally to V
DD2
bit 5 of address to DRAM, ROM and IC
bit 6 of address to DRAM, ROM and IC
bit 7 of address to DRAM, ROM and IC
not connected
bit 8 of address to DRAM, ROM and IC
bit 9 of address to DRAM, ROM and IC
row address strobe to DRAM; active LOW
not connected
write enable to DRAM and IC; active LOW
internally connected; do not use
bit 0 of data bus to/from DRAM, ROM and IC
bit 1 of data bus to/from DRAM, ROM and IC
+5 V power supply digital; connected internally to V
DD1
0 V power supply digital; connected internally to V
SS1
and V
SS3
not connected
bit 2 of data bus to/from DRAM, ROM and IC
bit 3 of data bus to/from DRAM, ROM and IC
column address strobe to DRAM; active LOW
bit 10 of address to DRAM, ROM and IC
bit 7 of data bus to/from DRAM, ROM and IC
bit 6 of data bus to/from DRAM, ROM and IC
bit 5 of data bus to/from DRAM, ROM and IC
bit 4 of data bus to/from DRAM, ROM and IC
chip/processor reset input (active HIGH)
bidirectional serial data to/from optional Decryptor
primary I
2
C-bus serial clock input
primary I
2
C-bus serial data
serial clock to optional Decryptor
oscillator input from crystal/external clock input
ground
supply
O
O
O
O
O
O
O
I/O
I/O
supply
ground
I/O
I/O
O
O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
O
I
SYMBOL
PIN
I/O
DESCRIPTION