參數(shù)資料
型號: SAA7102E
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: Digital video encoder
中文描述: COLOR SIGNAL ENCODER, PBGA156
封裝: 15 X 15 MM, 1.05 MM HEIGHT, PLASTIC, MO-192, SOT-700-1, LBGA-156
文件頁數(shù): 41/76頁
文件大小: 289K
代理商: SAA7102E
2001 Sep 25
41
Philips Semiconductors
Product specification
Digital video encoder
SAA7102; SAA7103
7.20
I
2
C-bus format
Table 32
I
2
C-bus write access to control registers; see Table 37
Table 33
I
2
C-bus write access to cursor bit map (subaddress FEH); see Table 37
Table 34
I
2
C-bus write access to colour look-up table (subaddress FFH); see Table 37
Table 35
I
2
C-bus read access to control registers; see Table 37
Table 36
I
2
C-bus read access to cursor bit map or colour LUT; see Table 37
Table 37
Explanations of Tables 32 to 36
Notes
1.
2.
X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
S 1 0 0 0 1 0 0 0 A SUBADDRESS
A
DATA 0
A
--------
DATA n
A
P
S 1 0 0 0 1 0 0 0 A FEH
A
RAM ADDRESS
A
DATA 0
A
--------
DATA n
A
P
S 1 0 0 0 1 0 0 0 A FFH
A
RAM ADDRESS
A
DATA 0R
A
DATA 0G
A
DATA 0B
A
--------
P
S 1 0 0 0 1 0 0 0 A SUBADDRESS
A
Sr
1 0 0 0 1 0 0 1
A
DATA 0
Am
--------
DATA n
Am
P
S 1 0 0 0 1 0 0 0 A FEH
or
FFH
A RAM ADDRESS A Sr 1 0 0 0 1 0 0 1 A DATA 0 Am -------- DATA n Am P
CODE
DESCRIPTION
S
Sr
1 0 0 0 1 0 0 X; note 1
A
Am
SUBADDRESS; note 2
DATA
--------
P
RAM ADDRESS
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
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