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參數(shù)資料
| 型號(hào)： | SAA7110A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器) |
| 中文描述： | COLOR SIGNAL DECODER, PQCC68 |
| 封裝： | PLASTIC, MO-047AC, SOT-188-2, LCC-68 |
| 文件頁數(shù)： | 41/72頁 |
| 文件大小： | 441K |
| 代理商： | SAA7110A |
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1998 May 15
41
Philips Semiconductors
Product specification
Enhanced Video Input Processor (EVIP)
SAA7111A
17 I
2
C-BUS DESCRIPTION
17.1
I
2
C-bus format
Table 7
Write procedure
Table 8
Read procedure (combined format)
Table 9
Description of I
2
C-bus format
Notes
1.
2.
If more than one byte DATA is transmitted then the auto-increment of the subaddress is performed.
During slave transmitter mode the SCL-LOW period may be extended by pulling SCL to LOW (in accordance with
the I
2
C-bus specification).
The I
2
C-bus subaddress 00 has to be initialized with 0 before being read.
3.
S
SLAVE ADDRESS W
ACK-s
SUBADDRESS
ACK-s
DATA (N BYTES)
ACK-s
P
S
Sr
SLAVE ADDRESS W
SLAVE ADDRESS R
ACK-s
ACK-s
SUBADDRESS
DATA (N BYTES)
ACK-s
ACK-m
P
CODE
DESCRIPTION
S
Sr
Slave address W
Slave address R
ACK-s
ACK-m
Subaddress
Data
P
X = LSB slave
address
Slave address
START condition
repeated START condition
0100 1000b (IICSA = LOW) or 0100 1010b (IICSA = HIGH)
0100 1001b (IICSA = LOW) or 0100 1011b (IICSA = HIGH)
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte; see Table 10
data byte; see Table 10; note 1
STOP condition
read/write control bit; X = 0, order to write (the circuit is slave receiver); X = 1, order to read
(the circuit is slave transmitter)
read = 49H or 4BH; note 2
write = 48H or 4AH
IICSA = 0 or 1
00H chip version
01H reserved
02h to 05H front-end part
06H to 13H decoder part
14H reserved
15H to 17H decoder part
18H to 19H reserved
1AH to 1CH Line-21 text slicer part
1DH to 1EH reserved
1FH status byte
Subaddresses
read and write; note 3
read and write
read and write
read and write
read only
read only
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7111A | Enhanced Video Input Processor EVIP |
| SAA7111AH | Enhanced Video Input Processor EVIP |
| SAA7111AHZ | GT 13C 13#16 SKT PLUG |
| SAA7112 | Decoder With High-Performance Scaler(HPS) for Image Port (PELICAN)(運(yùn)用在影像端口中的帶有高性能定標(biāo)器的譯碼器) |
| SAA7113H | 9-bit Video Input Processor(9位視頻輸入處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7110AWP/00 | 制造商:NXP Semiconductors 功能描述: |
| SAA7111 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Video Input Processor VIP |
| SAA7111A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Video Input Processor EVIP |
| SAA7111AH | 制造商:NXP Semiconductors 功能描述: 制造商:Philips Semiconductor 功能描述: 制造商:NXP Semiconductors 功能描述:TV/VIDEO SIGNAL PROCESSOR, 64 Pin, Plastic, QFP |
| SAA7111AH/V4,557 | 功能描述:視頻 IC ENHANCED VIDEO INPUT RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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