參數(shù)資料
型號(hào): SAA7115
廠商: NXP Semiconductors N.V.
英文描述: PAL/NTSC/SECAM Video Decoder with Adaptive PAL/NTSC Comb Filter, High Performance Scaler, I2C Sliced Data Readback and SQ PIXEL OUTPUT
中文描述: PAL / NTSC制式/ SECAM視頻解碼器,自適應(yīng)PAL / NTSC制式梳狀濾波器,高性能潔牙機(jī),刨切的I2C數(shù)據(jù)回讀和SQ像素輸出
文件頁(yè)數(shù): 29/214頁(yè)
文件大?。?/td> 732K
代理商: SAA7115
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Pemnr
NAeue
Filename:
SAA7115_Datasheet.fm
Confidential - NDA required
page 29
Last edited by H. Lambers
Philips Semiconductors
CS-PD Hamburg
CVIP2
Datasheet
SAA7115
Date:
10/23/01
Version:
0.67
The chrominance low-pass 1 characteristic also influences the grade of cross-luminance reduction during horizontal
colour transients (large chrominance bandwidth means strong suppression of cross-luminance). If the Y-comb filter is
disabled by YCOMB = 0 the filter influences directly the width of the chrominance notch within the luminance path (a
large chrominance bandwidth means wide chrominance notch resulting in a lower luminance bandwidth).
The low-pass filtered signals are fed to the adaptive comb filter block. The chrominance components are separated from
the luminance via a two line vertical stage (four lines for PAL standards) and a decision logic and mixing stage between
VEDG, MEDG, VEDT and CMBT. This block is bypassed for SECAM signals. The comb filter logic can be enabled
independently for the succeeding luminance and chrominance processing by YCOMB (subaddress 09H, bit 6) and/or
CCOMB (subaddress 0EH, bit 0). It is always bypassed during VBI or raw data lines programmable by the LCRn
registers (subaddresses 41H to 57H); see Section 8.4.
The separated C
B
-C
R
components are further processed by a second filter stage (low-pass 2) to modify the chrominance
bandwidth without influencing the luminance path. It’s characteristic is controlled by CHBW (subaddress 10H, bit 3). For
the complete transfer characteristic of low-passes 1 and 2 see Figs 11 and 12.
The SECAM processing (bypassed for QAM standards) contains the following blocks:
Baseband ‘bell’ filters to reconstruct the amplitude and phase equalized 0
°
and 90
°
FM signals
Phase demodulator and differentiator (FM-demodulation)
De-emphasis filter to compensate the pre-emphasized input signal, including frequency offset compensation (DB or
DR white carrier values are subtracted from the signal, controlled by the SECAM switch signal).
The succeeding chrominance gain control block amplifies or attenuates the C
B
-C
R
signal according to the required
ITU 601/656 levels. It is controlled by the output signal from the amplitude detection circuit within the burst processing
block.
The burst processing block provides the feedback loop of the chrominance PLL and contains the following:
Burst gate accumulator
Colour identification and colour killer
Comparison nominal/actual burst amplitude (PAL/NTSC standards only)
Loop filter chrominance gain control (PAL/NTSC standards only)
Loop filter chrominance PLL (only active for PAL/NTSC standards)
PAL/SECAM sequence detection, H/2-switch generation.
The increment generation circuit produces the Discrete Time Oscillator (DTO) increment for both subcarrier generation
blocks. It contains a division by the increment of the line-locked clock generator to create a stable phase-locked sine
signal under all conditions (e.g. for non-standard signals).
The PAL delay line block eliminates crosstalk between the chrominance channels in accordance with the PAL standard
requirements. For NTSC colour standards the delay line can be used as an additional vertical filter. If desired, it can be
switched off by DCVF = 1. It is always disabled during VBI or raw data lines programmable by the LCRn registers
(subaddresses 41H to 57H); see Section 8.4. The embedded line delay is also used for SECAM recombination
(cross-over switches).
The colorstripe burst detector detects partly or fully phase inverted burst according to the Macrovision standard. The
protection level is reported by the status flags COLSTR and TYPE3.
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