參數(shù)資料
型號(hào)： SAA7706H/N107S,557
廠商： NXP Semiconductors
文件頁數(shù)： 52/52頁
文件大?。?/td> 0K
描述： IC DSP CAR RADIO 80QFP
標(biāo)準(zhǔn)包裝： 330
類型： 汽車信號(hào)處理器
接口： I²C，I²:S，LSB，SPDIF
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 3.30V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-BQFP
供應(yīng)商設(shè)備封裝： 80-QFP（14x20）
包裝： 托盤
2001 Mar 05
9
Philips Semiconductors
Product specication
Car radio Digital Signal Processor (DSP)
SAA7706H
Table 1
Brief explanation of used pin types
PHONE_GND
73
apio gsmcap
common mode reference input pin of the PHONE signal
VDDA1
74
vddco
positive supply analog (ADC1, ADC2, ADC3 and level-ADC only)
VSSA1
75
vssco
ground supply analog (ADC3 and level-ADC only)
VDACN2
76
apio
ground reference voltage (ADC2)
CD_(L)_GND
77
apio gsmcap
common mode reference input pin for analog CD or TAPE or in the event of
separated ground reference pins used for CD_L or TAPE_L
VREFAD
78
apio
common mode reference voltage ADC1, ADC2, ADC3 and level-ADC
FM_RDS
79
apio gsmcap
FM RDS signal; analog input pin
FM_MPX
80
apio gsmcap
FM multiplex signal; analog input pin
PIN TYPE
EXPLANATION
apio
3-state I/O analog; I/O pad cell; actually pin type vddco
apio gsmcap
3-state I/O analog; I/O pad cell; actually pin type vddco with high GSM immunity
bpts5thdt5v
43 MHz bidirectional pad; push-pull input; 3-state output; 5 ns slew rate control; TTL; hysteresis;
pull-down; 5 V tolerant
bpts10tht5v
21 MHz bidirectional pad; push-pull input; 3-state output; 10 ns slew rate control; TTL; hysteresis;
5 V tolerant
bpts10thdt5v
21 MHz bidirectional pad; push-pull input; 3-state output; 10 ns slew rate control; TTL; hysteresis;
pull-down; 5 V tolerant
iic400kt5v
I2C-bus pad; 400 kHz I2C-bus specication; TTL; 5 V tolerant
iptht5v
input pad buffer; TTL; hysteresis; 5 V tolerant
ipthdt5v
input pad buffer; TTL; hysteresis; pull-down; 5 V tolerant
iptut5v
input pad buffer; TTL; pull-up; 5 V tolerant
op4mc
output pad buffer; 4 mA output drive; CMOS; slew rate control; 50 MHz
ots10ct5v
output pad buffer; 3-state, 10 ns slew rate control; CMOS; 5 V tolerant
ops10c
output pad buffer; 4 mA output drive; CMOS; slew rate control; 21 MHz
vdde
VDD supply peripheral only
vsse
VSS supply peripheral only
vddco
VDD supply to core only
vssco
VSS supply to core only (vssco does not connect the substrate)
vddi
VDD supply to core and peripheral
vssis
VSS supply to core and peripheral; with substrate connection
SYMBOL
PIN
PIN TYPE
DESCRIPTION
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