
ThunderBird Q3D PCI Audio
Accelerator
SAA7780
Philips Semiconductors
Product Specification
1999 Sep 30
15
to this register will discharge the external capacitors to emulate the 558 one shots. Software can then poll the joystick
register bit to resolve each of the joystick axes positions by timing. The joystick button register bits have meaning in
both the digital and analog modes. The axes bits are only valid for analog mode.
Game Port 558-Based Register - Gameport (RO) )
SAA7780 Signal Definitions
PCI Local Bus Interface Signals
I/O GMBASE
D7
D6
D5
D4
D3
D2
D1
D0
Offset 1h
JOYB_2
JOYB_1
JOYA_2
JOYA_1
JOYB_Y
JOYB_X
JOYA_Y
JOYA_X
POR Value
1
1
1
1
0
0
0
0
Bit
Name
R/W
Function
7
JOYB_2
RO
Joystick B button 2 status. The joystick buttons should be de-bounced and
de-glitched from the chip interface. The joystick button status registers are
cleared when the joystick button is pressed.
6
JOYB_1
RO
Joystick B button 1 status.
5
JOYA_2
RO
Joystick A button 2 status.
4
JOYA_1
RO
Joystick A button 1 status.
3
JOYB_Y
RO
Joystick B y-coordinate. Can also be referred to as position 3.
2
JOYB_X
RO
Joystick B x-coordinate. Can also be referred to as position 2.
1
JOYA_Y
RO
Joystick A y-coordinate. Can also be referred to as position 1.
0
JOYA_X
RO
Joystick A x-coordinate. Can also be referred to as position 0.
AD[31:0]
39,42,43,44,
45,46,48,49,
52,53,55,57,
59,61,63,64,
77,78,79,82,
83,85,86,87,
89,91,92,93,
94,95,97,98
IO-T
PCI Address/Data
AD[31:0] contains a physical byte address during the first clock of a
PCI transaction, and data during subsequent clocks.
When the SAA7780 is a PCI master, AD[31:0] are outputs during
the address phase of a transaction. They are either inputs or outputs
during the data phase, depending on the type of PCI cycle in
process.
When the SAA7780 is a PCI slave, AD[31:0] are inputs during the
address phase. They are either inputs or outputs during the data
phase, depending on the type of PCI cycle in process.