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參數(shù)資料
| 型號(hào)： | SAA7785 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ThunderBird Avenger（TM） PCI Audio Accelerator(雷鳥Avenger（TM）PCI音頻加速器) |
| 中文描述： | 雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器（雷鳥復(fù)仇者（商標(biāo)）的PCI音頻加速器） |
| 文件頁數(shù)： | 12/68頁 |
| 文件大小： | 1303K |
| 代理商： | SAA7785 |
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ThunderBird Avenger
TM
PCI Audio
Accelerator
SAA7785
Philips Semiconductors
Preliminary Specification
1999
Nov 12
12
The SAA7785 ThunderBird Avenger
TM
chip is designed to operate on any PCI system with the proper software sup-
port. Software support is required for non-DOS applications, such as Windows
(tm)
drivers. Non Pentium
(tm)
based sys-
tem can also be supported with the additional software.
Systems that provide DDMA or have the ISA bridge on the primary PCI bus are able to perform SoundBlaster emulation
enabling the operation of legacy DOS based games. The SAA7785 ThunderBird Avenger
TM
chip provides two 8237
style DMA channels to perform legacy DMA cycles on selected systems. The same two 8237 channels provide Distrib-
uted DMA support as well. PC/PCI is also supported to provide legacy DMA support on chipsets that support said pro-
tocol. For systems that support neither DDMA nor PC/PCI, there is a software solution implemented as a TSR.
DirectSound acceleration, both for 2D and 3D audio along with wavetable sample fetching, is accomplished using the
SAA7785 ThunderBird Avenger
TM
chip PCI 2.1 bus master. This bus master provides the means for the SAA7785
ThunderBird Avenger
TM
chip to accelerate DirectSound audio streams as well as fetch wavetable sample for the 64
voice wavetable synthesis and effects algorithms. Wavetable sample fetching is always retrieved from system memory
saving the cost of an external wavetable ROM. Downloadable sample sets, with software, are also supported using the
bus master hardware.
Additionally, the SAA7785 ThunderBird Avenger
TM
chip follows the AC97 Architecture to provide high quality audio by
the use of one or more separate codecs. Serial DACs, as well as AC97 CODECs can be selected to providing audio
into the analog world for low cost playback. Multi-channel AC97 CODECs can be used to provide up to 8 channels of
audio output.
A programmable DSP core is also provided to run the audio algorithms for wavetable synthesis, FM synthesis, special
effects such as reverb and chorus, along with sample rate conversion and data management. The imbedded DSP core
and its peripherals are managed solely by the DSP and requires no intervention from the host. The host can DSP can
pass messages to and from each domain to provide a host software interface into the DSP domain.
PCI Interface, Configuration, and Interrupt Serializer
The SAA7785 ThunderBird Avenger
TM
chip PCI interface is composed of master and slave state machines, an
address/data/byte enable datapath, a bus arbiter for the two on chip masters, control logic for the master and slave
internal busses, an interrupt serializer, and the standard PCI configuration register header.
The standard PCI configuration header is also supported. Since the SAA7785 ThunderBird Avenger
TM
is a multi-func-
tion device, there are three PCI configuration spaces allocated for each function. The three functions are the audio
device, the joystick and the 16650 UART. The purpose of the multiple configuration headers is to ensure PCI compli-
ance and enable the operating system to select the correct software driver for each individual device. The Serial CFG
Port is used to shift in subvendor specific data for each of the PCI configuration headers. The Serial CFG port is an
industry standard I
2
C
TM
format. The configuration headers are included in the PCI interface to reduce inter-block rout-
ing. All other PCI configuration space registers are included in the blocks that utilize these registers.
Clocks and the PLL Subsystem
Clocks for operation of the SAA7785 ThunderBird Avenger
TM
are derived from two sources; an external crystal and bit
clock from the AC97 CODEC. The SAA7785 ThunderBird Avenger
TM
PLL Subsystem derives its reference from the
external crystal.
The SAA7785 ThunderBird Avenger
TM
substem consists of a fixed layout PLL cell and a digital interface to the 8 bit PS
bus. The PLL is designed to drive the clocks for the DSP subsystem. The implementation calls for the PLL to be utilized
with complete programmable register interface to enable the tuning of the frequencies as necessary.
Multimedia Timer
The SAA7785 ThunderBird Avenger
TM
chip supplies a 20-bit, .84 uS resolution timer for game synchronization. The
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