參數(shù)資料
型號： SAA7818HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： DVD and CD playback IC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP208
封裝： 28 X 28 MM, 1.40 MM HEIGHT, PLASTIC, SOT-459-1, MS-026, LQFP-208
文件頁數(shù)： 9/30頁
文件大?。?/td> 118K
代理商： SAA7818HL
9397 750 14312
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 25 November 2004
9 of 30
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
UA9
UA11
UA10
V
DDD(P6)
V
SSD(P6)
UDA7
92
93
94
95
96
97
B
B
B
P
P
B
M/T
M/T
M/T
Port 2; upper microcontroller address line; bit 9
Port 2; upper microcontroller address line; bit 11
Port 2; upper microcontroller address line; bit 10
digital supply voltage 6 for the pad cells (3.3 V)
digital ground 6 for the pad cells
Port 0; multiplexed microcontroller data/lower
address line; bit 7
Port 0; multiplexed microcontroller data/lower
address line; bit 6
Port 0; multiplexed microcontroller data/lower
address line; bit 5
Port 0; multiplexed microcontroller data/lower
address line; bit 4
Port 0; multiplexed microcontroller data/lower
address line; bit 3
Port 0; multiplexed microcontroller data/lower
address line; bit 2
Port 0; multiplexed microcontroller data/lower
address line; bit 1
Port 0; multiplexed microcontroller data/lower
address line; bit 0
digital supply voltage 7 for the pad cells (3.3 V)
digital ground 7 for the pad cells
read signal input or general purpose I/O
write signal output or general purpose I/O
UART 2 transmit line output or general purpose
I/O
UART 2 receive line input or general purpose I/O
interrupt 1 input or general purpose I/O
interrupt 0 input or general purpose I/O
UART 1 transmit line output or general purpose
I/O
UART 1 receive line input or general purpose I/O
digital supply voltage 3 for the core (1.8 V)
digital ground 3 for the core
host reset input
host interface/generic DMA; bit 7
host interface/generic DMA; bit 8
(mode 1 = MEAS_CFLG)
host interface/generic DMA; bit 6
host interface/generic DMA; bit 9
(mode 1 = MEAS1)
host interface/generic DMA; bit 5
M/T
UDA6
98
B
M/T
UDA5
99
B
M/T
UDA4
100
B
M/T
UDA3
101
B
M/T
UDA2
102
B
M/T
UDA1
103
B
M/T
UDA0
104
B
M/T
V
DDD(P7)
V
SSD(P7)
P3_7_RDN
P3_6_WRN
P3_5_TXD2
105
106
107
108
109
P
P
B
B
B
M/T
M/T
M/T
P3_4_RXD2
P3_3_INT1
P3_2_INT0
P3_1_TXD1
110
111
112
113
B
B
B
B
M/T
M/T
M/T
M/T
P3_0_RXD1
V
DDD(C3)
V
SSD(C3)
HRESET
DD7
DD8
114
115
116
117
118
119
B
P
P
I
B
B
M/T
AL/T
AL/T
DD6
DD9
120
121
B
B
AL/T
AL/T
DD5
122
B
AL/T
Table 3:
Symbol
Pin description
…continued
Pin
Type
[1]
Drive/
threshold
Description
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