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參數(shù)資料
| 型號： | SAB-C502-LP |
| 廠商： | SIEMENS A G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8-BIT, 6 MHz, MICROCONTROLLER, PDIP40 |
| 文件頁數(shù)： | 10/46頁 |
| 文件大?。?/td> | 567K |
| 代理商： | SAB-C502-LP |
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Semiconductor Group
9
C502
XTAL1
21
19
–
XTAL1
Input to the inverting oscillator amplifier and
input to the internal clock generator circuits.
To drive the device from an external clock
source, XTAL1 should be driven, while XTAL2
is left unconnected. There are no requirements
on the duty cycle of the external clock signal,
since the input to the internal clocking circuitry
is divided down by a divide-by-two flip-flop.
Minimum and maximum high and low times as
well as rise fall times specified in the AC
characteristics must be observed.
P2.0 – P2.7
24–31
21–28
I/O
Port 2
ia a bidirectional I/O port with internal pull-up
resistors. Port 2 pins that have 1s written to
them are pulled high by the internal pull-up
resistors, and in that state can be used as
inputs. As inputs, port 2 pins being externally
pulled low will source current (
I
IL
, in the DC
characteristics) because of the internal pull-up
resistors. Port 2 emits the high-order address
byte during fetches from external program
memory and during accesses to external data
memory that use 16-bit addresses (MOVX
@DPTR). In this application it uses strong
internal pull-up resistors when issuing 1s.
During accesses to external data memory that
use 8-bit addresses (MOVX @Ri), port 2
issues the contents of the P2 special function
register.
PSEN
32
29
O
The
Program Store Enable
output is a control signal that enables the
external program memory to the bus during
external fetch operations. It is activated every
six oscillator periodes except during external
data memory accesses. Remains high during
internal program execution.
*) I = Input
O = Output
Pin Definitions and Functions
(cont’d)
Symbol
Pin Number
I/O*)
Function
P-LCC-44
P-DIP-40
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