參數(shù)資料
型號: SAB80C537-M
廠商: SIEMENS A G
元件分類: 微控制器/微處理器
英文描述: 8-Bit CMOS Single-Chip Microcontroller
中文描述: 8-BIT, 12 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, MQFP-100
文件頁數(shù): 28/56頁
文件大小: 668K
代理商: SAB80C537-M
SAB 80C515/80C535
Semiconductor Group
27
Interrupt Structure
The SAB 80C515 has 12 interrupt vectors with the following vector addresses and request
flags:
Each interrupt vector can be individually enabled/disabled. The minimum response time to an
interrupt request is more than 3 machine cycles and less than 9 machine cycles.
Figure 5 shows the interrupt request sources.
External interrupts 0 and 1 can be activated by a low-level or a negative transition (selectable)
at their corresponding input pin, external interrupts 2 and 3 can be programmed for triggering
on a negative or a positive transition. The external interrupts 3 or 6 are combined with the
corresponding alternate functions compare (output) and capture (input) on port 1.
For programming of the priority levels the interrupt vectors are combined to pairs. Each pair can
be programmed individually to one of four priority levels by setting or clearing one bit in the
special function register IP0 and one in IP1.
Figure 6 shows the priority level structure.
Table 3
Interrupt Sources and Vectors
Source (Request Flags)
Vector Address
Vector
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
IADC
IEX2
IEX3
IEX4
IEX5
IEX6
0003
H
000B
H
0013
H
001B
H
0023
H
002B
H
0043
H
004B
H
0053
H
005B
H
0063
H
006B
H
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
A/D converter interrupt
External interrupt 2
External interrupt 3
External interrupt 4
External interrupt 5
External interrupt 6
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