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參數(shù)資料
| 型號： | SAF-C164SV-2RF |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 25/65頁 |
| 文件大?。?/td> | 932K |
| 代理商： | SAF-C164SV-2RF |
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C164SV
Data Sheet
27
V1.0, 2003-04
Preliminary
Watchdog Timer
The Watchdog Timer represents one of the fail-safe mechanisms which have been
implemented to prevent the controller from malfunctioning for longer periods of time.
The Watchdog Timer is always enabled after a reset of the chip, and can only be
disabled in the time interval until the EINIT (end of initialization) instruction has been
executed. Thus, the chip’s start-up procedure is always monitored. The software has to
be designed to service the Watchdog Timer before it overflows. If, due to hardware or
software related failures, the software fails to do so, the Watchdog Timer overflows and
generates an internal hardware reset and pulls the RSTOUT pin low in order to allow
external hardware components to be reset.
The Watchdog Timer is a 16-bit timer, clocked with the system clock divided by 2/4/128/
256. The high byte of the Watchdog Timer register can be set to a prespecified reload
value (stored in WDTREL) in order to allow further variation of the monitored time
interval. Each time it is serviced by the application software, the high byte of the
Watchdog Timer is reloaded. Thus, time intervals between 20
s and 336 ms can be
monitored (@ 25 MHz).
The default Watchdog Timer interval after reset is 5.24 ms (@ 25 MHz).
Parallel Ports
The C164SV provides up to 50 I/O lines which are organized into four input/output ports
and one input port. All port lines are bit-addressable, and all input/output lines are
individually (bit-wise) programmable as inputs or outputs via direction registers. The I/O
ports are true bidirectional ports which are switched to high impedance state when
configured as inputs. The output drivers of Port 8 can be configured (pin by pin) for push/
pull operation or open-drain operation via a control register. During the internal reset, all
port pins are configured as inputs.
All port lines have programmable alternate input or output functions associated with
them. All port lines that are not used for these alternate functions may be used as general
purpose IO lines.
PORT0 may be used as address and data lines when accessing external memory. Also
the serial interfaces ASC0 and SSC use the upper pins of P0H.
Ports P1L, P1H, and P8 are associated with the capture inputs or compare outputs of
the CAPCOM units and/or serve as external interrupt inputs.
Port 5 is used for the analog input channels to the A/D converter or timer control signals.
Port 20 includes the bus control signals RD, WR, ALE, the configuration input EA, the
the system control output RSTOUT, and the system clock output CLKOUT (or the
programmable frequency output FOUT).
The edge characteristics (transition time) and driver characteristics (output current) of
the C164SV’s port drivers can be selected via the Port Output Control registers
(POCONx).
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