參數(shù)資料
型號: SAF-C509-L
廠商: SIEMENS AG
元件分類: 8位微控制器
英文描述: 8-Bit CMOS Microcontroller
中文描述: 8位CMOS微控制器
文件頁數(shù): 54/74頁
文件大?。?/td> 1607K
代理商: SAF-C509-L
Semiconductor Group
53
09.96
C509-L
The A/D converter provides the following features:
– 15 multiplexed input channels, which can also be used as digital inputs (port 7, port 8)
– 10-bit resolution
– Single or continuous conversion mode
– Internal or external start-of-conversion trigger capability
– Programmable conversion and sample clock
– Interrupt request generation after each conversion
– Using successive approximation conversion technique via a capacitor array
– Built-in hidden calibration of offset and linearity errors
The A/D converter uses basically three clock signals for operation : the input clock f
IN
(=1/t
IN
), the
conversion clock f
ADC
(=1/t
ADC
) and the sample clock f
SC
(=1/t
SC
). All clock signals are derived
from the C509-L system clock f
OSC
which is applied at the XTAL pins. The input clock f
IN
is equal
to f
OSC
while the conversion clock and the sample clock must be adapted. The conversion clock is
limited to a maximum frequency of 2 MHz. The table in
figure 28
defines the divider ratio for the
conversion and sample clock of each combination of the prescaler bits.
Figure 28
A/D Converter Clock Selection
Conversion Clock f
ADC
ADCL1 ADCL0
Sample Clock f
SC
ADST1 ADST0
0
f
ADC
0
ADST1 ADST0
0
1
ADST1 ADST0
1
0
ADST1 ADST0
1
1
0
0
f
IN
4
f
IN
8
f
IN
16
f
IN
32
f
IN
8
f
IN
16
f
IN
32
f
IN
64
f
IN
16
f
IN
32
f
IN
64
f
IN
128
f
IN
32
f
IN
64
f
IN
128
f
IN
256
f
IN
64
f
IN
128
f
256
f
IN
512
0
1
1
0
1
1
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