參數(shù)資料
型號(hào): SB-36112VX-295N
廠商: DATA DEVICE CORP
元件分類: 位置變換器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA
文件頁數(shù): 5/8頁
文件大?。?/td> 139K
代理商: SB-36112VX-295N
5
Data Device Corporation
www.ddc-web.com
SB-36110VX
H-01/06-0
ADDRESS CONFIGURATION
The SB-3611X card requires that the user program the base
address by setting jumpers and DIP switches on the card.
Before installing the SB-3611X card, refer to FIGURE 3 for DIP
Switch Configuration and FIGURE 4 for Reference Jumper
Selection.
The SB-3611X card can be operated in 16-, 24- or 32-bit
address modes (See FIGURE 2). Selection of the address mode
is set by two jumpers, JP1 (3) and JP1 (2), which when made
disable address lines A24-31 and A16-31 respectively and set
the AM0-5 combination to which the card will respond with the
selected address line combination. The card is in 32-bit address
mode when jumpers JP1 (2) and JP1 (3) are not installed.
Operation in protected mode is possible and is invoked by
installing jumper JP1 (1). When this jumper is connected, the
processor can only access the card when in supervisor mode;
otherwise the card can be accessed in either supervisor or user
mode.
The Address of the SB-3611X in the example shown in FIGURE
3 is set to HEX address 8000 (in 16-Bit address mode). The user
may choose from 0000 0000h to FFFF FF00h in 100 HEX incre-
ments.
TABLE 5. JP1 ADDRESSING MODE
JUMPER SELECTION
JP1 (1) JP1 (2) JP1 (3)
DESCRIPTION
AM CODE
Off
On
A24 non-privileged data access
39
On
Off
On
A24 supervisory data access
3D
Off
On
X
A16 non-privileged data access
29
On
X
A16 supervisory data access
2D
Off
A32 non-privileged data access
09
On
1. X = Don’t care.
2. When JP1(2) is linked the use of JP1(3) is “don’t care”.
Off
A32 supervisory data access
0D
VME_RDC_EPLD1
C3
C4
C54
C5
C53
C52
C6
C7
C14
C13
C36
C8
P1
J1
JP1
1
2
3
4
JP1(4)
JP1(3)
JP1(2)
JP1(1)
FIGURE 2. 16/24/32 BIT ADDRESS
JUMPER CONFIGURATION
VME_RDC_EPLD1
C3
C4
C54
C5
C53
C52
C6
C7
C14
C13
C16
C15
C18
C17
C20
C19
C22
C21
C24
C23
C30
C29
C36
C8
P1
U1
U2
U3
1
2
3
45
67
8
ON
1
2
3
45
67
8
ON
1
2
3
45
67
8
ON
J1
JP1
1
2 3 4
A8
A15
A16
A23
A24
A31
1
2
3
4
5
6
7
8
ON
A8
A15
0
0 0
LSB
MSB
0
Binary
Hex
A8
A9
A14
A11
A12
A13
A10
A15
A1
A2
A7
A4
A5
A6
A3
A0
0
1 0
0
8
A0 - A7
Hard Coded
for
0000 0000
SW3
SW2
SW1
*Note: ON = Logic 0
OFF = Logic 1
"Reverse Logic"
* SW1
FIGURE 3. ADDRESS DIP SWITCH
CONFIGURATION
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