Copyright 1998 National Semiconductor Corp.
4
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2.0 Pin Description
Table 1:
Pin Description
PIN NAME
TYPE
DESCRIPTION
SCLK
Vdd
Vss
PD
7..0
RFCLK
1
2
3
5
OUTPUT (slope controlled). CR16A bus interface System CLocK output.
Digital supply voltage
Digital ground.
TRI-STATE OUTPUT. Power Down pins 7 to 0. PD7,6 have 12 mA drive.
4-11
5
12
5b
OUTPUT (Slope controlled). 10 MHz clock output. Logic ‘0’ after reset or when dis-
abled.
OUTPUT. Load Enable. Can be synchronized to LKD input
TRI-STATE OUTPUT. Serial data output.
OUTPUT. Serial interface clock: 1.152 MHz
INPUT. LocK Detect input for synchronisation purposes.
INPUT. Received Data. It is programmable to invert this input.
INPUT. Comparator reference level. Internally a six bit DAC can be connected to
this pin to compensate for DC offsets.
INPUT. 6-bit ADC input with peak hold circuitry. Activated on PD0 = low. If PD0 =
high the RSSI input will be discharged to ground.
Analog supply voltage
Analog ground
TRI-STATE OUTPUT. Transmit Data. Can be programmed to be inverted.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. UART data output.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. UART data input.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit.Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull down resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor. General purpose memory
mapped I/O port bit. Can be switched to ADPCM/CODEC testpoints.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
INPUT/OUTPUT with selectable pull up resistor and 12 mA drive current. General
purpose memory mapped I/O port bit. Can be programmed to generate an internal
interrupt.
MEN1n
SO
SK
LKD
RDI
CMPREF
13
14
15
16
17
18
5
1
5
1
analog
analog
RSSI
19
analog
AVD
AVS
TDO
P0[0] or
UTX
P0[1] or
URX
P0[2]
20
21
22
23
5/analog
2
24
3
25
2
P0[3]
26
2
P0[4]
27
2
P0[5]
28
3
P0[6]
29
3
P0[7]
30
2
P1[0]
31
2
P1[1]
32
2
P1[2]
33
2
P1[3]
34
2
P1[4]
35
2