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參數(shù)資料
| 型號： | SC14425XVJG |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 基帶處理器 |
| 英文描述： | Complete Baseband processor for DECT Base Stations with Caller-id and Handsfree |
| 中文描述： | 完整的基帶處理器面向DECT基站與來電顯示和免提 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 78K |
| 代理商： | SC14425XVJG |
Copyright 2000 National Semiconductor Corp.
1
www.national.com
SC14425
Complete Baseband processor for DECT Base Stations
with Caller-id and Handsfree
General Description
The SC14425SC14425 is a 3.3 Volt CMOS IC optimized
to handle all the audio, signal and data processing needed
within a DECT base station. An ADPCM transcoder, a
very low power 14 bit Codec and Analog Frontend are in-
tegrated. Direct connections towards analog or ISDN line
interface.
The SC14425 has an on-chip dedicated flexible DSP op-
timized for telecom applications caller-id, handsfree and
allows easy connection to digital telephone answering
machine devices.
The SC14425 is designed to be compatible with many
radio interfaces. A dedicated TDMA controller handles all
physical layer slot formats and radio control. The integrat-
ed National Semiconductor’s standard CR16B processor
core takes care of all the higher protocol stack. Program-
mable I/O ports can be configured as chip selects for I/O
expanders, Serial Flashes, interrupt source or I/O. A dig-
ital serial interface can be configured to interface to indus-
try-standard codecs and ISDN devices with
μ
-Law, a-Law,
linear or transparent data formats.
Features
n
Integrated DECT base band transceiver optimized for
GAP base stations according to ETS 300 175-2,3 & 8.
n
2.7 to 3.3 Volt operating voltage.
n
Embedded 16 bit CompactRISC
TM
CR16B Microproc-
essor with In System Emulation (ISE) mode.
n
On-chip 6kByte Data Memory.
n
Embedded flexible dedicated DSP executing Caller-id
(CID), Caller-id on Call Waiting (CIDCW) and hands-
free, two echo cancellers, two echo suppressors, ex-
tended DTMF detection, DTMF generation, sidetone
and artificial echo loss.
n
Two full duplex 32 kbits/sec ADPCM transcoder.
n
On-chip Dedicated Instruction Processor (DiP) for all
TDMA based events, which supports 1.152MHz,
0.576MHz and 0.288MHz data rates.
n
Protected and unprotected full and double slot B-fields
n
Standard DECT encryption with different keys for
different MAC-connections.
n
At least 6 MAC connections can be handled simultane-
ously.
n
Flexible three wire interface to radio front synthesizer.
n
One 14-bit linear CODEC with programmable gain
n
Peak hold ADC for RSSI measurement
n
Two input 8 bit successive approximation ADC.
n
Three general purpose I/O ports with programmable in-
terrupts
n
Full duplex UART, SPI
TM
and MICROWIRE
TM
interface.
n
Flexible 8 kHz synchronous Serial interface to external
codecs and ISDN interface circuits.
n
Two general purpose timers and watch dog timer.
n
Programmable chip selects to 8 bit wide ROM, SRAM
NAND Flash Memory and I/O expanders.
n
Two Capture timers for frequency measurement for
e.g. metering, ringing and call progress tone detection.
n
100 pin TQFP-100 package.
Note 1:
CompactRISC
TM
is a trademark of National Semiconductor Cor-
poration,
SPI
TM
is a trademark of Motorola.
________________________________________________________________________________________________
System Diagram
sc14404
ISDN or
Data
Interface
PSTN
Interface
PSTN
Interface
sc14425
CID
Handsfree
ISDN
PSTN1
PSTN2
sc14404
sc14404
sc14404
sc14404
PRELIMINARY
FEBRUARY 2000
S
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