380h(1) INDF0 " />
參數(shù)資料
型號(hào): SC16C554DBIB64,151
廠商: NXP Semiconductors
文件頁(yè)數(shù): 31/57頁(yè)
文件大?。?/td> 0K
描述: IC UART QUAD W/FIFO 64-LQFP
產(chǎn)品培訓(xùn)模塊: Stand-Alone UARTs
標(biāo)準(zhǔn)包裝: 160
通道數(shù): 4,QUART
FIFO's: 16 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 827 (CN2011-ZH PDF)
其它名稱: 568-3270
935276669151
SC16C554DBIB64-S
PIC12(L)F1822/PIC16(L)F1823
DS41413C-page 38
2010-2012 Microchip Technology Inc.
Bank 7
380h(1)
INDF0
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
381h(1)
INDF1
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
382h(1)
PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
383h(1)
STATUS
—TO
PD
ZDC
C
---1 1000 ---q quuu
384h(1)
FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
385h(1)
FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
386h(1)
FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
387h(1)
FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
388h(1)
BSR
BSR<4:0>
---0 0000 ---0 0000
389h(1)
WREG
Working Register
0000 0000 uuuu uuuu
38Ah(1)
PCLATH
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
38Bh(1)
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
0000 000x 0000 000u
38Ch
Unimplemented
38Dh
Unimplemented
38Eh
Unimplemented
38Fh
Unimplemented
390h
Unimplemented
391h
IOCAP
IOCAP5
IOCAP4
IOCAP3
IOCAP2
IOCAP1
IOCAP0
--00 0000 --00 0000
392h
IOCAN
IOCAN5
IOCAN4
IOCAN3
IOCAN2
IOCAN1
IOCAN0
--00 0000 --00 0000
393h
IOCAF
IOCAF5
IOCAF4
IOCAF3
IOCAF2
IOCAF1
IOCAF0
--00 0000 --00 0000
394h
Unimplemented
395h
Unimplemented
396h
Unimplemented
397h
Unimplemented
398h
Unimplemented
399h
Unimplemented
39Ah
CLKRCON
CLKREN
CLKROE
CLKRSLR
CLKRDC<1:0>
CLKRDIV<2:0>
0011 0000 0011 0000
39Bh
Unimplemented
39Ch
MDCON
MDEN
MDOE
MDSLR
MDOPOL
MDOUT
MDBIT
0010 ---0 0010 ---0
39Dh
MDSRC
MDMSODIS
MDMS<3:0>
x--- xxxx u--- uuuu
39Eh
MDCARL
MDCLODIS
MDCLPOL MDCLSYNC
MDCL<3:0>
xxx- xxxx uuu- uuuu
39Fh
MDCARH
MDCHODIS MDCHPOL MDCHSYNC
MDCH<3:0>
xxx- xxxx uuu- uuuu
TABLE 3-8:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend:
x
= unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note
1:
These registers can be addressed from any bank.
2:
PIC16(L)F1823 only.
3:
Unimplemented. Read as ‘1’.
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