參數(shù)資料
型號： SC16C554DIA68,512
廠商： NXP Semiconductors
文件頁數(shù)： 1/55頁
文件大?。?/td> 0K
描述： IC UART QUAD W/FIFO 68-PLCC
標(biāo)準(zhǔn)包裝： 18
通道數(shù)： 4，QUART
FIFO's： 16 字節(jié)
電源電壓： 2.5V，3.3V，5V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 68-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 68-PLCC
包裝： 管件
其它名稱： 568-1110-5
935271490512
SC16C554DIA68
SC16C554/554D
Quad UART with 16-byte FIFO and infrared (IrDA)
encoder/decoder
Rev. 05 — 10 May 2004
Product data
1.
Description
The SC16C554/554D is a 4-channel Universal Asynchronous Receiver and
Transmitter (QUART) used for serial data communications. Its principal function is to
convert parallel data into serial data and vice versa. The UART can handle serial data
rates up to 5 Mbit/s. It comes with an Intel or Motorola interface.
The SC16C554/554D is pin compatible with the ST16C554 and TL16C554 and it will
power-up to be functionally equivalent to the 16C454. Programming of control
registers enables the added features of the SC16C554/554D. Some of these added
features are the 16-byte receive and transmit FIFOs, automatic hardware or software
ow control and Infrared encoding/decoding. The selectable auto-ow control feature
signicantly reduces software overload and increases system efciency while in FIFO
mode by automatically controlling serial data ow using RTS output and CTS input
signals. The SC16C554/554D also provides DMA mode data transfers through FIFO
trigger levels and the TXRDY and RXRDY signals. On-board status registers provide
the user with error indications, operational status, and modem interface control.
System interrupts may be tailored to meet user requirements. An internal loop-back
capability allows on-board diagnostics.
The SC16C554/554D operates at 5 V, 3.3 V and 2.5 V, and the industrial temperature
range, and is available in plastic PLCC68, LQFP64, and LQFP80 packages.
2.
Features
s 5 V, 3.3 V and 2.5 V operation
s Industrial temperature range
s The SC16C554/554D is pin compatible with the industry-standard
ST16C454/554, ST68C454/554, ST16C554, TL16C554
s Up to 5 Mbit/s data rate at 5 V and 3.3 V, and 3 Mbit/s at 2.5 V
s 16-byte transmit FIFO
s 16-byte receive FIFO with error ags
s Automatic software/hardware ow control
s Programmable Xon/Xoff characters
s Software selectable Baud Rate Generator
s Four selectable Receive FIFO interrupt trigger levels
s Standard modem interface or infrared IrDA encoder/decoder interface
s Sleep mode
s Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun
Break)
s Transmit, Receive, Line Status, and Data Set interrupts independently controlled
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