參數(shù)資料
型號(hào)： SC16C652IB48
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Dual UART with 32 bytes of transmit and receive FIFOs
中文描述： 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, MS-026, SOT313-2, LQFP-48
文件頁數(shù)： 17/41頁
文件大?。?/td> 575K
代理商： SC16C652IB48
Philips Semiconductors
SC16C652
Dual UART with 32 bytes of transmit and receive FIFOs
Product data
Rev. 04 — 20 June 2003
17 of 41
9397 750 11634
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
7.2.2
IER versus Receive/Transmit FIFO polled mode operation
When FCR[0] = logic 1, resetting IER[0-3] enables the SC16C652 in the FIFO polled
mode of operation. In this mode, interrupts are not generated and the user must poll
the LSR register for TX and/or RX data status. Since the receiver and transmitter
have separate bits in the LSR either or both can be used in the polled mode by
selecting respective transmit or receive control bit(s).
LSR[0] will be a logic 1 as long as there is one byte in the receive FIFO.
LSR[1-4] will provide the type of receive errors, or a receive break, if encountered.
LSR[5] will indicate when the transmit FIFO is empty.
LSR[6] will indicate when both the transmit FIFO and transmit shift register are
empty.
LSR[7] will show if any FIFO data errors occurred.
7.3 FIFO Control Register (FCR)
This register is used to enable the FIFOs, clear the FIFOs, set the receive FIFO
trigger levels, and select the DMA mode.
7.3.1
DMA mode
Mode 0 (FCR bit 3 = 0):
Set and enable the interrupt for each single transmit or
receive operation, and is similar to the 16C450 mode. Transmit Ready (TXRDY) will
go to a logic 0 whenever the FIFO (THR, if FIFO is not enabled) is empty. Receive
Ready (RXRDY) will go to a logic 0 whenever the Receive Holding Register (RHR) is
loaded with a character.
Mode 1 (FCR bit 3 = 1):
Set and enable the interrupt in a block mode operation. The
transmit interrupt is set when the transmit FIFO is below the programmed trigger
level. The receive interrupt is set when the receive FIFO fills to the programmed
trigger level. However, the FIFO continues to fill regardless of the programmed level
until the FIFO is full. RXRDY remains a logic 0 as long as the FIFO fill level is above
the programmed trigger level.
相關(guān)PDF資料
PDF描述
SC16C654IB64 Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C652IB48,128 功能描述:UART 接口集成電路 16C 2.5V-5V 2CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C652IB48,151 功能描述:UART 接口集成電路 16C 2.5V-5V 2CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C652IB48,157 功能描述:UART 接口集成電路 16C 2.5V-5V 2CH UART 32B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C654 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder
SC16C654B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.), with 64-byte FIFOs and infrared (IrDA) encoder/decoder
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