參數(shù)資料
型號(hào): SC16C750BIA44,512
廠商: NXP Semiconductors
文件頁數(shù): 40/44頁
文件大小: 0K
描述: IC UART 64BYTE 44PLCC
標(biāo)準(zhǔn)包裝: 26
通道數(shù): 1,UART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC
包裝: 管件
其它名稱: 935274402512
SC16C750BIA44
SC16C750BIA44-ND
SC16C750B_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 17 October 2008
5 of 44
NXP Semiconductors
SC16C750B
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
5.2 Pin description
Fig 4.
Pin conguration for LQFP64
SC16C750BIB64
XTAL1
D4
XTAL2
n.c.
D3
IOW
D2
n.c.
IOW
D1
n.c.
D0
GND
n.c.
IOR
VCC
IOR
n.c.
RI
DDIS
n.c.
TXRDY
DCD
n.c.
DSR
AS
n.c.
CTS
A2
BAUDOUT
A1
n.c.
CS2
A0
CS1
RXRDY
n.c.
CS0
INT
TX
n.c.
OUT2
n.c.
RTS
RX
n.c.
RCLK
DTR
n.c.
D7
OUT1
D6
n.c.
D5
RESET
n.c.
002aaa590
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
Table 2.
Pin description
Symbol
Pin
Type
Description
PLCC44 LQFP64
HVQFN32
A2, A1, A0 29, 30,
31
17, 18, 20
16, 17, 18 I
Register select. A0 to A2 are used during read and write
operations to select the UART register to read from or write to.
Refer to Table 3 for register addresses and refer to AS description.
AS
28
15
-
I
Address strobe. When AS is active (LOW), A0, A1, and A2 and
CS0, CS1, and CS2 drive the internal select logic directly; when AS
is HIGH, the register select and chip select signals are held at the
logic levels they were in when the LOW-to-HIGH transition of AS
occurred.
BAUDOUT 17
64
8
O
Baud out. BAUDOUT is a 16
× clock signal for the transmitter
section of the UART. The clock rate is established by the reference
oscillator frequency divided by a divisor specied in the baud rate
generator divisor latches. BAUDOUT may also be used for the
receiver section by tying this output to RCLK.
CS0, CS1,
CS2
14, 15,
16
59, 61, 62
-
I
Chip select. When CS0 and CS1 are HIGH and CS2 is LOW, these
three inputs select the UART. When any of these inputs are inactive,
the UART remains inactive (refer to AS description).
CS
-
7
I
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