LVP
參數(shù)資料
型號(hào): SC16C754BIA68,512
廠商: NXP Semiconductors
文件頁數(shù): 40/50頁
文件大小: 0K
描述: IC UART QUAD 64BYTE 68PLCC
標(biāo)準(zhǔn)包裝: 18
通道數(shù): 4,QUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 68-PLCC
包裝: 管件
其它名稱: 935274938512
SC16C754BIA68
SC16C754BIA68-ND
PIC16(L)F1826/27
DS41391D-page 46
2011 Microchip Technology Inc.
REGISTER 4-2:
CONFIGURATION WORD 2
R/P-1
U-1
R/P-1
R/P-1/1
LVP(1)
DEBUG(2)
—BORV
STVREN
PLLEN
bit 13
bit 8
U-1
R/P-1/1
U-1
R/P-1
Reserved
—WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared
‘1’ = Bit is set
-n = Value when blank or after Bulk Erase
bit 13
LVP:
Low-Voltage Programming Enable bit
1
= Low-voltage programming enabled
0
= High-voltage on MCLR must be used for programming
bit 12
DEBUG:
In-Circuit Debugger Mode bit
1
= In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0
= In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
bit 11
Unimplemented:
Read as ‘1’
bit 10
BORV:
Brown-out Reset Voltage Selection bit
1
= Brown-out Reset voltage set to 1.9V (typical)
0
= Brown-out Reset voltage set to 2.5V (typical)
bit 9
STVREN:
Stack Overflow/Underflow Reset Enable bit
1
= Stack Overflow or Underflow will cause a Reset
0
= Stack Overflow or Underflow will not cause a Reset
bit 8
PLLEN:
PLL Enable bit
1
= 4xPLL enabled
0
= 4xPLL disabled
bit 7-5
Unimplemented:
Read as ‘1’
bit 4
Reserved:
This location should be programmed to a ‘1’.
bit 3-2
Unimplemented:
Read as ‘1’
bit 1-0
WRT<1:0>:
Flash Memory Self-Write Protection bits
2 kW Flash memory (PIC16(L)F1826 only):
11
= Write protection off
10
= 000h to 1FFh write-protected, 200h to 7FFh may be modified by EECON control
01
= 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control
00
= 000h to 7FFh write-protected, no addresses may be modified by EECON control
4 kW Flash memory (PIC16(L)F1827 only):
11
= Write protection off
10
= 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01
= 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00
= 000h to FFFh write-protected, no addresses may be modified by EECON control
Note 1:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
2:
The DEBUG bit in Configuration Word is managed automatically by device development tools
including debuggers and programmers. For normal device operation, this bit should be
maintained as a '1'.
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