- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11825 > SC16C852VIBS,551 (NXP Semiconductors)IC UART DUAL W/FIFO 48-HVQFN PDF資料下載
參數(shù)資料
| 型號(hào)： | SC16C852VIBS,551 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 5/55頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART DUAL W/FIFO 48-HVQFN |
| 產(chǎn)品培訓(xùn)模塊： | Stand-Alone UARTs |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 特點(diǎn)： | 可編程 |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 128 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 2.5V |
| 帶自動(dòng)流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動(dòng)位檢測(cè)功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-HVQFN EP（6x6） |
| 包裝： | 托盤 |
| 其它名稱： | 568-4210 935283102551 SC16C852VIBS-S |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
SC16C852V
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 21 January 2011
13 of 55
NXP Semiconductors
SC16C852V
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
In the event that the receive buffer is overfilling, the SC16C852V automatically sends an
Xoff character (when enabled) via the serial TX output to the remote UART. The
SC16C852V sends the Xoff1/Xoff2 characters as soon as the number of received data in
the receive FIFO passes the programmed trigger level. To clear this condition, the
SC16C852V will transmit the programmed Xon1/Xon2 characters as soon as the number
of characters in the receive FIFO drops below the programmed trigger level.
6.7 Special character detect
A special character detect feature is provided to detect an 8-bit character when EFR[5] is
set. When an 8-bit character is detected, it will be placed on the user-accessible data
stack along with normal incoming RXA/RXB data. This condition is selected in conjunction
with EFR[3:0] (see Table 26). Note that software flow control should be turned off when
using this special mode by setting EFR[3:0] to all zeroes.
The SC16C852V compares each incoming receive character with Xoff2 data. If a match
occurs, the received data will be transferred to the FIFO, and ISR[4] will be set to indicate
detection of a special character. Although Table 9 “SC16C852V internal registers” shows
Xon-1, Xon-2, Xoff-1, Xoff-2 with eight bits of character information, the actual number of
bits is dependent on the programmed word length. Line Control Register bits LCR[1:0]
define the number of character bits, that is, either 5bits, 6bits, 7bits or 8bits. The word
length selected by LCR[1:0] also determine the number of bits that will be used for the
special character comparison. Bit 0 in the Xon-1, Xon-2, Xoff-1, Xoff-2 registers
corresponds with the LSB bit for the received character.
6.8 Interrupt priority and time-out interrupts
The interrupts are enabled by IER[7:0]. Care must be taken when handling these
interrupts. Following a reset, if Interrupt Enable Register (IER) bit 1 = 1, the SC16C852V
will issue a Transmit Holding Register interrupt. This interrupt must be serviced prior to
continuing operations. The ISR indicates the current singular highest priority interrupt
only. A condition can exist where a higher priority interrupt masks the lower priority
interrupt(s) (see Table 14). Only after servicing the higher pending interrupt will the lower
priority interrupt(s) be reflected in the status register. Servicing the interrupt without
investigating further interrupt conditions can result in data errors.
Receive Data Ready and Receive Time Out have the same interrupt priority (when
enabled by IER[0]), and it is important to serve these interrupts correctly. The receiver
issues an interrupt after the number of characters have reached the programmed trigger
level. In this case, the SC16C852V FIFO may hold more characters than the programmed
trigger level. Following the removal of a data byte, the user should re-check LSR[0] to see
if there are any additional characters. A Receive Time Out will not occur if the receive
FIFO is empty. The time-out counter is reset at the center of each stop bit received or
each time the Receive Holding Register (RHR) is read. The actual time-out value is
4 character time, including data information length, start bit, parity bit, and the size of stop
bit, that is, 1
×, 1.5×, or 2× bit times.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-B7R-IX-F4 | CONVERTER MOD DC/DC 7.5V 75W |
| SC16C650BIBS,151 | IC UART SINGLE W/FIFO 32-HVQFN |
| SC16C650BIA44,518 | IC UART SINGLE W/FIFO 44-PLCC |
| ATMEGA325PV-10AUR | MCU AVR 32K FLASH 10MHZ 64TQFP |
| SC16IS762IBS-T | IC UART DUAL I2C/SPI 32-HVQFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C852VIBS-G | 功能描述:UART 接口集成電路 1.8V 2CH UART 128B FIFO 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852VIBS-S | 功能描述:UART 接口集成電路 1.8V 2CH UART 128B FIFO 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852VIET | 功能描述:UART 接口集成電路 1.8V 2CH UART 128B FIFO 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852VIET,115 | 功能描述:UART 接口集成電路 1.8V 2CH UART 128B RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C852VIET,118 | 功能描述:UART 接口集成電路 UART 2-CH 128Byte FIFO 1.8V 36-Pin RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。