參數(shù)資料
型號(hào): SC16IS762IBS,128
廠商: NXP Semiconductors
文件頁(yè)數(shù): 24/60頁(yè)
文件大?。?/td> 0K
描述: IC DUAL UART 64BYTE 32HVQFN
標(biāo)準(zhǔn)包裝: 1,500
特點(diǎn): 低電流
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.5V, 3.3V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-HVQFN(5x5)
包裝: 帶卷 (TR)
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
其它名稱: 935279293128
SC16IS762IBS-F
SC16IS762IBS-F-ND
SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 9 — 22 March 2012
30 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.13 Transmitter FIFO Level register (TXLVL)
This register is a read-only register. It reports the number of spaces available in the
transmit FIFO.
8.14 Receiver FIFO Level register (RXLVL)
This register is a read-only register, it reports the fill level of the receive FIFO, that is, the
number of characters in the RX FIFO.
8.15 Programmable I/O pins Direction register (IODir)
This register is used to program the I/O pins direction. Bit 0 to bit 7 controls GPIO0 to
GPIO7.
8.16 Programmable I/O pins State register (IOState)
When ‘read’, this register returns the actual state of all I/O pins. When ‘write’, each
register bit will be transferred to the corresponding I/O pin programmed as output.
Table 24.
Transmitter FIFO Level register bits description
Bit
Symbol
Description
7
-
not used; set to zeros
6:0
TXLVL[6:0]
number of spaces available in TX FIFO, from 0 (0x00) to 64 (0x40)
Table 25.
Receiver FIFO Level register bits description
Bit
Symbol
Description
7
-
not used; set to zeros
6:0
RXLVL[6:0]
number of characters stored in RX FIFO, from 0 (0x00) to 64 (0x40)
Table 26.
IODir register bits description
Bit
Symbol
Description
7:0
IODir
Set GPIO pins [7:0] to input or output.
0 = input
1 = output
Table 27.
IOState register bits description
Bit
Symbol
Description
7:0
IOState
Write this register: set the logic level on the output pins
0 = set output pin to zero
1 = set output pin to one
Read this register: return states of all pins
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