參數(shù)資料
型號(hào): SC515847MFU
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁數(shù): 58/142頁
文件大?。?/td> 6464K
代理商: SC515847MFU
Device User Guide — 9S12DT128DGV2/D V02.15
22
Freescale Semiconductor
Port H
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J[1:0]
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[1:0] by clearing the bits PERJ1 and PERJ0 at
Base+$026C.
Port K
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
Port M[7:6]
PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
Port P6
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
Port S[7:4]
PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
PAD[15:8] (ATD1 channels)
Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1
registers!
Pins not available in 80 pin QFP package for MC9S12DB128, SC515846, and SC102202
Port H
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J[7:6, 1:0]
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[7:6, 1:0] by clearing the bits PERJ7, PERJ6,
PERJ1 and PERJ0 at Base+$026C.
Port K
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
Port M[1:0]
PM1:0 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
Port P6
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
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