參數(shù)資料
型號： SC80C451CCA68
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Pressure Transducer, Series 19 mm, Compensated, Pressure Range: 0 psi to 15 psi, Gage, 1/8-27 NPT, 10 Vdc excitation
中文描述： 8-BIT, 12 MHz, MICROCONTROLLER, PQCC68
封裝： PEDESTAL, PLASTIC, MO-047AE, SOT-188-3, LCC-68
文件頁數(shù)： 10/22頁
文件大?。?/td> 162K
代理商： SC80C451CCA68
Philips Semiconductors
Product specification
80C451/83C451/87C451
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, expanded I/O
1998 May 01
10
DC ELECTRICAL CHARACTERISTICS
1
T
amb
= 0
°
C to +70
°
C, V
CC
= 5V
±
10%, V
SS
= 0V (87C451, 83C451, 80C451)
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYPICAL
1
MAX
UNIT
V
IL
Input low voltage; except EA
–0.5
0.2V
CC
–0.1
V
V
IL1
Input low voltage to EA
0
0.2V
CC
–0.3
V
V
IH
Input high voltage; except XTAL1, RST
0.2V
CC
+0.9
V
CC
+0.5
V
V
IH1
Input high voltage; XTAL1, RST
0.7V
CC
V
CC
+0.5
V
V
OL
Output low voltage; ports 1, 2, 3, 4, 5, 6
I
OL
= 1.6mA
2
I
OL
= 3.2mA
2
0.45
V
V
OL1
Output low voltage; port 0, ALE, PSEN
0.45
V
V
OH
Output high voltage; ports 1, 2, 3, 4, 5, 6
I
OH
= –60
μ
A,
I
OH
= –25
μ
A
I
OH
= –10
μ
A
2.4
V
V
V
0.75V
CC
0.9V
CC
V
OH1
Output high voltage (port 0 in external bus mode, ALE,
PSEN)
3
I
OH
= –800
μ
A,
I
OH
= –300
μ
A
I
OH
= –80
μ
A
2.4
0.75V
CC
0.9V
CC
V
V
V
I
IL
Logical 0 input current,; ports 1, 2, 3, 4, 5, 6
V
IN
= 0.45V
–50
μ
A
I
TL
Logical 1-to-0 transition current; ports 1, 2, 3, 4, 5, 6
See note 4
–650
μ
A
I
LI
Input leakage current; port 0
V
IN
= V
IL
or V
IH
+10
μ
A
I
CC
Power supply current:
Active mode @ 12MHz
5
Idle mode @ 12MHz
5
Power down mode
See note 6
11.5
1.3
3
25
4
50
mA
mA
μ
A
R
RST
Internal reset pull-down resistor
50
300
k
C
IO
NOTES:
1. Typical ratings are based on a limited number of samples taken from early manufacturing lots and are not guaranteed. The values listed are
at room temperature, 5V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
OL
s of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
3. Capacitive loading on ports 0 and 2 may cause the V
OH
on ALE and PSEN to momentarily fall below the 0.9V
CC
specification when the
address bits are stabilizing.
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V
IN
is approximately 2V.
5. I
CCMAX
at other frequencies is given by:
Active mode: I
CCMAX
= 0.94 X FREQ + 13.71
Idle mode: I
where FREQ is the external oscillator frequency in MHz. I
CCMAX
is given in mA. See Figure 13.
6. See Figures 14 through 17 for I
CC
test conditions.
7. C
IO
applies to ports 1 through 6, AFLAG, BFLAG, XTAL1, XTAL2.
Pin capacitance
7
10
pF
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