參數(shù)資料
型號(hào)： SCAN182245TSSCX
廠商： National Semiconductor Corporation
英文描述： Non-Inverting Transceiver with 25OHM Series Resistor Outputs
中文描述： 非反相與25OHM系列電阻器輸出
文件頁(yè)數(shù)： 11/18頁(yè)
文件大?。?/td> 231K
代理商： SCAN182245TSSCX
SCAN ABT Live Insertion and Power Cycling Characteristics
SCAN ABT is intended to serve in Live Insertion backplane
applications. It provides 2nd Level Isolation
1
which indicates
that while external circuitry to control the output enable pin
is unnecessary, there may be a need to implement differen-
tial length backplane connector pins for V
CC
and GND. As
well, pre-bias circuitry for backplane pins may be necessary
to avoid capacitive loading effects during live insertion.
SCAN ABT provides control of output enable pins during
power cycling via the circuit in Figure A. It essentially con-
trols the G
n
pin until V
CC
reaches a known level.
Duringpower-up, when V
CC
ramps through the 0.0V to 0.7V
range, all internal device circuitry is inactive, leaving output
and I/O pins of the device in high impedance. From approxi-
mately 0.8V to 1.8V V
CC
, the Power-On-Reset circuitry,
(POR), in Figure A becomes active and maintains device
high impedance mode. The POR does this by providing a
low from its output that resets the flip-flop The output, Q, of
the flip-flop then goes high and disables the NOR gate from
an incidental low input on the G
n
pin. After 1.8V V
CC
, the
POR circuitry becomes inactive and ceases to control the
flip-flop. To bring the device out of high impedance, the G
n
input must receive an inactive-to-active transition, a high-to-
low transition on G
n
in this case to change the state of the
flip-flop. With a low on the Q output of the flip-flop, the NOR
gate is free to allow propagation of a G
n
signal.
During power-down, the Power-On-Reset circuitry will be-
come active and reset the flip-flop at approximately 1.8V
V
CC
. Again, the Q output of the flip-flop returns to a high and
disables the NOR gate from inputs from the G
n
pin. The
device will then remain in high impedance for the remaining
ramp down from 1.8V to 0.0V V
CC
.
Some suggestions to help the designer with live insertion
issues:
#
The G
n
pin can float during power-up until the Power-On-
Reset circuitry becomes inactive.
#
The G
n
pin can float on power-down only after the Pow-
er-On-Reset has become active.
The description of the functionality of the Power-On-Reset
circuitry can best be described in the diagram of Figure B.
TL/F/11657–19
FIGURE A
TL/F/11657–20
FIGURE B
1
Section 7, ‘‘Design Consideration for Fault Tolerant Backplanes’’, Application Note AN-881.
SCAN ABT includes additional power-on reset circuitry not otherwise included in ABT devices.
http://www.national.com
11
相關(guān)PDF資料
PDF描述
SCAN182245A Non-Inverting Transceiver with 25OHM Series Resistor Outputs
SCAN182245AFCQB Non-Inverting Transceiver with 25OHM Series Resistor Outputs
SCAN182245TSSMQB Non-Inverting Transceiver with 25OHM Series Resistor Outputs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SCAN182245TSSMQB 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Non-Inverting Transceiver with 25OHM Series Resistor Outputs
SCAN182245TSSMX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Non-Inverting Transceiver with 25OHM Series Resistor Outputs
SCAN182373_YBE3026B WAF 制造商:Fairchild Semiconductor Corporation 功能描述:
SCAN182373A 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Transparent Latch with 25ohm Series Resistor Outputs
SCAN182373ASSC 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
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