參數(shù)資料
型號： SCC2692
廠商： NXP Semiconductors N.V.
英文描述： Dual universal asynchronous receiver/transmitter (DUART）(雙通用異步接收器/傳送器)
中文描述： 雙路通用異步接收器/發(fā)送器（杜阿爾特）（雙通用異步接收器/傳送器）
文件頁數(shù)： 11/30頁
文件大小： 209K
代理商： SCC2692
Philips Semiconductors
Product specification
SCC2692
Dual asynchronous receiver/transmitter (DUART)
1998 Sep 04
11
Table 1.
SCC2692 Register Addressing
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
READ (RDN = 0)
Mode Register A (MR1A, MR2A)
Status Register A (SRA)
BRG Test
Rx Holding Register A (RHRA)
Input Port Change Register (IPCR)
Interrupt Status Register (ISR)
Counter/Timer Upper Value (CTU)
Counter/Timer Lower Value (CTL)
Mode Register B (MR1B, MR2B)
Status Register B (SRB)
1X/16X Test
Rx Holding Register B (RHRB)
Reserved
Input Ports IP0 to IP6
Start Counter Command
Stop Counter Command
WRITE (WRN = 0)
Mode Register A (MR1A, MR2A)
Clock Select Register A (CSRA)
Command Register A (CRA)
Tx Holding Register A (THRA)
Aux. Control Register (ACR)
Interrupt Mask Register (IMR)
C/T Upper Preset Value (CRUR)
C/T Lower Preset Value (CTLR)
Mode Register B (MR1B, MR2B)
Clock Select Register B (CSRB)
Command Register B (CRB)
Tx Holding Register B (THRB)
Reserved
Output Port Conf. Register (OPCR)
Set Output Port Bits Command
Reset Output Port Bits Command
* See Table 6 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68681 and SCC2698B”in application notes elsewhere in this publication
Table 2.
Register Bit Formats
BIT 7
RxRTS
CONTROL
BIT 6
RxINT
SELECT
BIT 5
ERROR
MODE*
BIT 4 BIT 3
BIT 2
PARITY
TYPE
BIT 1 BIT 0
BITS PER
CHARACTER
00 = 5
01 = 6
10 = 7
11 = 8
MR1A
MR1B
PARITY MODE
0 = No
1 = Yes
0 = RxRDY
1 = FFULL
0 = Char
1 = Block
00 = With Parity
01 = Force Parity
10 = No Parity
11 = Multidrop Mode
0 = Even
1 = Odd
NOTE:
*In block error mode, block error conditions must be cleared by using the error reset command (command 4x) or a receiver reset.
BIT 7 BIT 6
BIT 5
TxRTS
CONTROL
BIT 4
CTS
BIT 3 BIT 2 BIT 1 BIT 0
MR2A
MR2B
CHANNEL MODE
ENABLE Tx
STOP BIT LENGTH*
00 = Normal
01 = Auto-Echo
10 = Local loop
11 = Remote loop
0 = No
1 = Yes
0 = No
1 = Yes
0 = 0.563
1 = 0.625
2 = 0.688
3 = 0.750
4 = 0.813
5 = 0.875
6 = 0.938
7 = 1.000
8 = 1.563
9 = 1.625
A = 1.688
B = 1.750
C = 1.813
D = 1.875
E = 1.938
F = 2.000
NOTE:
*Add 0.5 to values shown for 0 – 7 if channel is programmed for 5 bits/char.
CSRA
CSRB
BIT 7 BIT 6 BIT 5 BIT 4
RECEIVER CLOCK SELECT
See Text
BIT 3 BIT 2 BIT 1 BIT 0
TRANSMITTER CLOCK SELECT
See Text
* See Table 6 for BRG Test frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68681 and SCC2698B”in application notes elsewhere in this publication
BIT 7
BIT 6 BIT 5 BIT 4
MISCELLANEOUS COMMANDS
BIT 3
BIT 2
BIT 1
BIT 0
CRA
CRB
DISABLE Tx
0 = No
1 = Yes
ENABLE Tx
0 = No
1 = Yes
DISABLE Rx
0 = No
1 = Yes
ENABLE Rx
0 = No
1 = Yes
See Text and Timing Requirement
NOTE:
Access to the miscellaneous commands should be separated by 3 X1 clock edges. A disabled transmitter cannot be loaded.
相關(guān)PDF資料
PDF描述
SCC2698A Enhanced Octal Universal Asynchronous Receiver/Transmitter (Octal UART)(增強型八路通用異步接收器/傳送器)
SCC2698B Enhanced octal universal asynchronous receiver/transmitter (Octal UART)(增強型八通用異步接收器/傳送器)
SCC68070 16/32-bit microprocessor
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