ABSOLUTE MAXIMUM RATINGS
參數(shù)資料
型號(hào): SCC68681C1N40,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 13/29頁(yè)
文件大小: 0K
描述: IC DUART 40DIP
標(biāo)準(zhǔn)包裝: 9
特點(diǎn): 故障啟動(dòng)位檢測(cè)
通道數(shù): 2,DUART
FIFO's: 3 位
電源電壓: 5V
帶自動(dòng)流量控制功能:
帶故障啟動(dòng)位檢測(cè)功能:
帶CMOS:
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-DIP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 828 (CN2011-ZH PDF)
其它名稱: 568-5049-5
935274553112
SCC68681C1N40
SCC68681C1N40,112-ND
SCC68681C1N40-ND
Philips Semiconductors
Product data
SCC68681
Dual asynchronous receiver/transmitter (DUART)
2004 Apr 06
20
ABSOLUTE MAXIMUM RATINGS1
SYMBOL
PARAMETER
RATING
UNIT
Tamb
Operating ambient temperature range2
See Note 4
°C
Tstg
Storage temperature range
–65 to +150
°C
All voltages with respect to ground3
–0.5 to +6.0
V
Maximum pin voltages
VSS – 0.5 V to VCC + 0.5 V
V
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other condition above those indicated in the operation section of this specification is not
implied.
2. For operating at elevated temperatures, the device must be derated based on +150
°C maximum junction temperature.
3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima.
4. Parameters are valid over specified temperature range. See Ordering information table for applicable operating temperature range and VCC
supply range.
DC ELECTRICAL CHARACTERISTICS1, 2, 3
Tamb = –40 °C to +85 °C; VCC = 5.0 V ± 10%
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
VIL
LOW-level input voltage
0.8
V
VIH
HIGH-level input voltage (except X1/CLK)
Tamb ≥ 0 °C
2.0
V
VIH
HIGH-level input voltage (except X1/CLK)
Tamb < 0 °C
2.5
V
VIH
HIGH-level input voltage (X1/CLK)
0.8 VCC
V
VOL
LOW-level output voltage
IOL = 2.4 mA
0.4
V
VOH
HIGH-level output voltage (except open-drain outputs)4
IOH = –400 A
VCC – 0.5
V
IIX1
X1/CLK input current
VIN = 0 V to VCC
–10
+10
A
IILX1
X1/CLK input LOW current – operating
VIN = 0 V
–75
0
A
IIHX1
X1/CLK input HIGH current – operating
VIN = VCC
0
75
A
IOHX2
X2 output HIGH current – operating
VOUT = VCC; X1 = 0
0
+75
A
IOHX2S
X2 output HIGH short circuit current – operating
VOUT = 0 V; X1 = 0
–10
–1
mA
IOLX2
X2 output LOW current – operating
VOUT = 0 V; X1 = VCC
–75
0
A
IOLX2S
X2 output LOW short circuit current – operating
VOUT = VCC; X1 = VCC
1
10
mA
Input leakage current:
II
All except input port pins
VIN = 0 V to VCC
–10
+10
A
Input port pins
VIN = 0 V to VCC
–20
+10
A
IOZH
Output off current HIGH, 3-state data bus
VIN = VCC
10
A
IOZL
Output off current LOW, 3-state data bus
VIN = 0 V
–10
A
IODL
Open-drain output LOW current in off-state
VIN = 0 V
–10
A
IODH
Open-drain output HIGH current in off-state
VIN = VCC
10
A
ICC
Power supply current5
ICC
Operating mode
CMOS input levels
10
mA
NOTES:
1. Parameters are valid over specified temperature range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4 V and 2.4 V with a transition time of
5 ns maximum. For X1/CLK this swing is between 0.4 V and 4.4 V. All time measurements are referenced at input voltages of 0.8 V and
2.0 V and output voltages of 0.8 V and 2.0 V, as appropriate.
3. Typical values are at +25
°C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: CL = 150 pF, except interrupt outputs. Test conditions for interrupt outputs: CL = 50 pF, RL = 2.7 k to VCC.
5. All outputs are disconnected. Inputs are switching between CMOS levels of VCC – 0.2 V and VSS + 0.2 V.
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