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參數(shù)資料
| 型號： | SCN2681T |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual asynchronous receiver/transmitter DUART |
| 中文描述： | 雙異步接收器/發(fā)送器杜阿爾特 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 114K |
| 代理商： | SCN2681T |
Philips Semiconductors
Product specification
SCN2681T
Dual asynchronous receiver/transmitter (DUART)
1998 Sep 04
9
t
CLK
t
CTC
t
Rx
t
Tx
X1/CLK
CTCLK
RxC
TxC
+5V
1K
X1
X2
X2
3.6864MHz
X1
C1
C2
DRIVING FROM
EXTERNAL SOURCE
SCN2681
74LS04
CLOCK
TO OTHER
CHIPS
1K
+5V
CRYSTAL SERIES RESISTANCE3 SHOULD BE LESS THAN 180
R2 = 50k
to 150k
R1: 100K - 1Meg (See design note)
C1 = C2: 0-5pF + (STRAY < 5pF)
t
CLK
t
CTC
t
Rx
t
Tx
OPEN
When using an external clock it is preferred to drive X2 and leave X1 open.
X2 is the input to the internal driver, while X1 is the output.
R1 is only required if U1 will not drive to X2 high level.
Previous specifications indicated X2 should be grounded and X1
should be driven. This is still acceptable. It is electrically easier to drive
the amplifier input than to overdrive its output.
TO THE REST
OF THE DUART
CIRCUITS
R1
U1
R2
SD00091
Figure 7. Clock Timing
SYMBOL
PARAMETER
LIMITS
Typ
UNIT
Min
90
2
55
0
55
0
0
110
0
0
Max
X1/CLK high or low time
X1/CLK frequency
CTCLK (IP2) high or low time
CTCLK (IP2) frequency
1
RxC high or low time
RxC frequency (16X)
1
(1X)
1
TxC high or low time
TxC frequency (16X)
1
(1X)
1
ns
MHz
ns
MHz
ns
MHz
MHz
ns
MHz
MHz
t
CLK
f
CLK
t
CTC
f
CTC
t
RX
f
RX
t
TX
f
TX
4
8
3.6864
8
1
4
1
NOTE:
1. Minimum frequencies are not tested but are guaranteed by design.
SD00103
TxD
TxC
(INPUT)
TxC
(1X OUTPUT)
t
TXD
t
TCS
1 BIT TIME
(1 OR 16 CLOCKS)
Figure 8. Transmit
SYMBOL
PARAMETER
LIMITS
UNIT
Min
Max
t
TXD
t
TCS
TxD output delay from TxC external clock input on IP pin
Output delay from TxC low at OP pin to TxD data output
300
100
ns
ns
0
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