參數(shù)資料
型號： SCS156
廠商： Microchip Technology Inc.
英文描述： Reloadable Token Card Chip(KeeLoq 表示卡芯片)
中文描述： 增值令牌卡芯片（而Keeloq表示卡芯片）
文件頁數(shù)： 23/170頁
文件大小： 4191K
代理商： SCS156
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 21
PIC16F62X
3.2.2.3
INTCON Register
The INTCON register is a readable and writable
register which contains the various enable and flag bits
for all interrupt sources except the comparator module.
See Section 3.2.2.4 and Section 3.2.2.5 for a
description of the comparator enable and flag bits.
REGISTER 3-3:
INTCON REGISTER (ADDRESS: 0Bh, 8Bh, 10Bh, 18Bh)
Note:
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-x
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
bit 7
bit 0
bit 7
GIE:
Global Interrupt Enable bit
1
= Enables all unmasked interrupts
0
= Disables all interrupts
bit 6
PEIE
: Peripheral Interrupt Enable bit
1
= Enables all unmasked peripheral interrupts
0
= Disables all peripheral interrupts
bit 5
T0IE
: TMR0 Overflow Interrupt Enable bit
1
= Enables the TMR0 interrupt
0
= Disables the TMR0 interrupt
bit 4
INTE
: RB0/INT External Interrupt Enable bit
1
= Enables the RB0/INT external interrupt
0
= Disables the RB0/INT external interrupt
bit 3
RBIE
: RB Port Change Interrupt Enable bit
1
= Enables the RB port change interrupt
0
= Disables the RB port change interrupt
bit 2
T0IF
: TMR0 Overflow Interrupt Flag bit
1
= TMR0 register has overflowed (must be cleared in software)
0
= TMR0 register did not overflow
bit 1
INTF
: RB0/INT External Interrupt Flag bit
1
= The RB0/INT external interrupt occurred (must be cleared in software)
0
= The RB0/INT external interrupt did not occur
bit 0
RBIF
: RB Port Change Interrupt Flag bit
1
= When at least one of the RB7:RB4 pins changed state (must be cleared in software)
0
= None of the RB7:RB4 pins have changed state
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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