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參數(shù)資料
| 型號： | SDM873 |
| 英文描述： | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| 中文描述： | 16單端/ 8差分輸入12位數(shù)據(jù)采集系統(tǒng) |
| 文件頁數(shù)： | 3/27頁 |
| 文件大?。?/td> | 256K |
| 代理商： | SDM873 |
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SDM862/863/872/873
3
SPECIFICATIONS
ELECTRICAL
At +25
°
C, V
CC
=
±
15V, V
DD
= 5V, external sample/hold capacitor of 4700pF.
* Specification same as SDM862/863/872/873J, A, R grades.
NOTES: (1) Measured at the same and hold output. (2) Measured with all input channels grounded. (3) The range of voltage on any input with respect to common over
which accuracy and leakage current is guaranteed. (4) Applicable over full operating temperature range. NO MISSING CODES GUARANTEED OVER TEMPERATURE
RANGE. (5) Adjustable to zero using external potentiometer or select-on-test resistor. (6) Specifications are at +25
°
C and measured at 50% level of transition. (7) When
using TTL drivers a 1k
pull-up resistor should be used. (8) Muxes operate in a break-before-make manner.
Unipolar Straight Binary (USB)
Bipolar Offset Binary (BOB)
+0.4
SDM862/863/872/873 J, A, R
SDM862/863/872/873 K, B, S
PARAMETERS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
SYSTEM TIMINGS
ADC Conversion Time: SDM862/SDM863
9
9
20
12
50
2
25
15
*
*
*
*
*
*
*
*
μ
s
μ
s
ns
ns
SDM872/SDM873
S/H Aperture Delay
S/H Aperture Uncertainty
TIMING
Throughput (Serial Mode)
SDM862/SDM863
SDM872/SDM873
(Overlap Mode):
SDM862/SDM863
SDM872/SDM873
22
28
*
*
kHz
kHz
33
50
*
*
kHz
kHz
MULTIPLEXER
(6)
Switching Time (between channels)
Settling Time (10V step to 0.02%)
Enable Time ‘ON’
‘OFF’
+1.5
2.5
1
0.25
*
*
*
*
μ
s
μ
s
μ
s
μ
s
2
*
*
0.5
INSTRUMENTATION AMPLIFIER
(6)
Settling Time (20V step to 0.01%)
G = 1
G = 10
G = 100
Slew Rate
5
3
4
17
12.5
7.5
7.5
*
*
*
*
*
*
*
μ
s
μ
s
μ
s
V/
μ
s
12
*
S/H AMPLIFIER
(6)
Acquisition (10V step to 0.01%)
Aperture Delay
Hold Mode Settling Time
Slew Rate
5
*
*
*
*
μ
s
ns
μ
s
V/
μ
s
50
1.5
10
OUTPUT
DIGITAL DATA
Output Codes: Unipolar
Bipolar
Logic Levels: Logic 0 (Sink = 1.6mA)
Logic 1 (Source = 500
μ
A)
Leakage (Data Bits Only), High-Z State
*
V
V
μ
A
+2.4
–5
*
*
0.1
+5
*
*
POWER SUPPLY REQUIREMENTS
Rated Voltage: Analog (
±
V
CC
)
14.25
4.5
15
5
13
22
11
580
15.75
5.5
22
30
15
855
*
*
*
*
*
*
*
*
*
*
*
*
*
*
VDC
VDC
mA
mA
mA
mW
Digital (V
DD
)
Supply Drain: +15V
–15V
+5V
Power Dissipation
TEMPERATURE RANGE
Operating Temperature Range
JH, KH/JL, KL
AH, BH/AL, BL
RH, SH/RL, SL
Storage Temperature Range
0
70
+85
+125
+150
*
*
*
*
*
*
*
*
°
C
°
C
°
C
°
C
–25
–55
–65
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SDM873A | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873B | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873J | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873K | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873R | 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDM873A | 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873B | 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873J | 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873K | 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
| SDM873R | 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS |
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