參數(shù)資料
型號: SDM873B
英文描述: 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
中文描述: 16單端/ 8差分輸入12位數(shù)據(jù)采集系統(tǒng)
文件頁數(shù): 4/27頁
文件大?。?/td> 256K
代理商: SDM873B
SDM862/863/872/873
4
DIGITAL TIMING
CONVERSION CYCLE TIMING
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
CONVERT MODE
tdsc
thec
tssc
thsc
tsrc
thrc
tsac
thac
Byte Selected Valid During CE High 50
tc 86X
Conversion Time: 12 Bit Cycle
8 Bit Cycle
tc 87X
Conversion Time: 12 Bit Cycle
8 Bit Cycle
Status Delay from CE
CE Pulse Width
CS to CE Setup
CS Low During CE High
R/C to CE Setup
R/C Low During CE High
Byte Select to CE Setup
100
30
20
20
0
20
0
20
20
13
12
8
200
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
μ
s
μ
s
μ
s
50
50
50
50
50
0
9
6
9
6
25
17
15
10
READ MODE
tdd
thd
thl
tssr
tsrr
tsar
thsr
thrr
thar
ths 86X
ths 87X
Access Time from CE
Data Valid after CE Low
Output Float Delay
CS to CE Setup
R/C to CE Setup
Byte Select to CE Setup
CS Valid after CE Low
R/C High after CE Low
Byte Select Valid after CE Low
Status Delay after Data Valid
Status Delay after Data Valid
75
35
100
0
0
25
0
0
25
500
300
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
150
50
0
50
0
0
50
100
100
1000
600
ABSOLUTE MAXIMUM RATINGS
(1)
+V
CC
to ACOM .................................................................... –0.5V to +16V
–V
CC
to ACOM ....................................................................... +0.5 to –16V
+V
to DCOM ................................................................... –0.5V to +7.0V
Analog Input Signal Range ................................ +V
+20V to –V
–20V
Digital Input Signal ...............................................................–0.5V to +V
DD
ACOM to DCOM ..................................................................................
±
1V
DBO
CE
t
HEC
t
SSC
t
SRC
t
HSC
t
HRC
t
HAC
t
SAC
t
DSC
t
C
High Impedance
CS
R/C
STS
DB11–
Byte
Select
NOTE: (1) Absolute maximum ratings are limiting values applied individually,
beyond which the serviceability of the circuit may be impaired. Functions
operation under any of these conditions is not necessarily implied.
/QM HIGH RELIABILITY SCREENING
High Power Internal
Visual Inspection .......................................... Burr-Brown Spec. QC2010
Stabilization Bake ............................................................. 24Hr at +150
°
C
Temperature Cycling...................................... 10 Cycles –65
°
C to +150
°
C
Constant Acceleration .......................................................... 30kG, Y1 axis
Hermeticity Fine Leak ................................................. Helium 5
x
10
–8
cc/s
Hermeticity Gross Leak......................................................... Fluorocarbon
Burn-In ............................................................................ 160Hr at +125
°
C
READ CYCLE TIMING
CE
t
SSR
t
SRR
t
HRR
t
HS
t
HD
High-Z
CS
R/C
t
HSR
t
HAR
t
SAR
Data Valid
t
HL
t
DD
STS
Byte
Select
DB11–
DBO
相關(guān)PDF資料
PDF描述
SDM873J 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873K 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873R 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873S 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM863R 16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SDM873J 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873K 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873R 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
SDM873S 制造商:BB 制造商全稱:BB 功能描述:16 Single Ended/8 Differential Input 12-BIT DATA ACQUISITION SYSTEMS
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