參數(shù)資料
型號: SG1525AL
廠商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分類: 穩(wěn)壓器
英文描述: REGULATING PULSE WIDTH MODULATOR
中文描述: 0.5 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, CQCC20
封裝: HERMETIC SEALED, CERAMIC, LCC-20
文件頁數(shù): 1/7頁
文件大?。?/td> 135K
代理商: SG1525AL
REGULATING PULSE WIDTH MODULATOR
FEATURES
8V to 35V operation
5.1V reference trimmed to ±1%
100Hz to 500KHz oscillator range
Separate oscillator sync terminal
Adjustable deadtime control
Internal soft-start
Input undervoltage lockout
Latching P.W.M. to prevent multiple
pulses
Dual source/sink output drivers
HIGH RELIABILITY FEATURES
- SG1525A, SG1527A
Available to MIL-STD-883B
MIL-M38510/12602BEA - JAN1525AJ
MIL-M38510/12604BEA - JAN1527AJ
Radiation data available
LMI level "S" processing available
DESCRIPTION
The SG1525A/1527A series of pulse width modulator integrated circuits are
designed to offer improved performance and lower external parts count when used
to implement all types of switching power supplies. The on-chip +5.1 volt reference
is trimmed to ±1% initial accuracy and the input common-mode range of the error
amplifier includes the reference voltage, eliminating external potentiometers and
divider resistors. A Sync input to the oscillator allows multiple units to be slaved
together, or a single unit to be synchronized to an external system clock. A single
resistor between the C
pin and the Discharge pin provides a wide range of deadtime
adjustment. These devices also feature built-in soft-start circuitry with only a timing
capacitor required externally. A Shutdown pin controls both the soft-start circuitry
and the output stages, providing instantaneous turn-off with soft-start recycle for
slow turn-on. These functions are also controlled by an undervoltage lockout which
keeps the outputs off and the soft-start capacitor discharged for input voltages less
than that required for normal operation. Another unique feature of these PWM
circuits is a latch following the comparator. Once a PWM pulse has been terminated
for any reason, the outputs will remain off for the duration of the period. The latch
is reset with each clock pulse. The output stages are totem-pole designs capable
of sourcing or sinking in excess of 200mA. The SG1525A output stage features
NOR logic, giving a LOW output for an OFF state. The SG1527A utilizes OR logic
which results in a HIGH output level when OFF.
BLOCK DIAGRAM
SG1525A/SG2525A/SG3525A
SG1527A/SG2527A/SG3527A
11/91 Rev 1.3 10/96
Copyright
1996
L
IN
F
IN
ITY
Microelectronics Inc.
11861 Western Avenue
Garden Grove, CA 92841
(714) 898-8121
FAX: (714) 893-2570
1
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