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參數(shù)資料
| 型號(hào)： | SG3842G |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | BiCMOS Green-Mode PWM Controllers |
| 中文描述： | BiCMOS工藝綠色模式PWM控制器 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 394K |
| 代理商： | SG3842G |
Product Specification
BiCMOS Green-Mode PWM Controllers
SG3842G/ SG3843G
System General Corp.
Version 1.4 ( IRO33.0007.B3)
- 12 -
www.sg.com.tw
Jun.28,2004
OPERATION DESCRIPTION
SG384xG devices have many advantages over traditional
384x devices and are completely pin-to-pin compatible
with them. The following descriptions highlight the
advantages and the differences of the SG384xGA designs.
Start-up Current
The required start-up current is typically only 5uA. This
ultra-low start-up current allows designers to supply the
start-up power required by the SG384xG using a
high-resistance and a low-wattage start-up resistor. For
example, an application using wide input range
(100V
AC
~240V
AC
) AC-to-DC power adapter could work
with a 1.5 M
/0.25W resistor, and a 10uF/25V Vcc
hold-up capacitor.
Operating Current
The operating current has been reduced to 5.0mA. This
low operating current results in higher efficiency and
reduces the required Vcc hold-up capacitance.
Oscillator Operation
The resistor R
T
and the capacitor C
T
, both connected to
the pin RT/CT, determine the oscillation frequency. The
capacitor C
T
is normally charged to 2.9V through the
resistor R
T,
which is connected to a 5V reference voltage
and discharged to 1.3V by a built-in constant current sink.
The dead-time is generated during the discharge period.
(
)
(
)
[
]
F
C
k
R
kHz
f
T
T
μ
×
=
72
.
)
(
Error Amplifier
The error amplifier’s inverting input is connected to the
FB pin, and the output is connected to the COMP pin. The
COMP output is available for external compensation,
allowing designers to control the feedback-loop
frequency-response. Non-inverting input is not wired out
to a pin, but it is internally biased to a fixed 2.5V ± 2%
voltage.
Current Sensing and PWM Limiting
The SG384xG current-sense input is designed for
current-mode control. Current-to-voltage conversion is
done externally through the current-sense resistor Rs.
Under normal operation, the COMP voltage determines
the peak-voltage across Rs. V
COMP
is the voltage at the pin
COMP and
n
is the current-sense input voltage gain.
S
COMP
n
pk
R
V
I
×
=
*
4
*
n
= is typically 5 (4.60 ~ 5.40) for the SG3842G standard
versions.
n
= 3 typically (2.76 ~ 3.24) for the SG3842G2,
and the SG3843G models.
This feature is compatible with general 384x series
products. A higher
n
value attenuates the feedback and
ensures loop stability under light-load conditions. The
inverting input to the SG384xG current-sense comparator
is internally clamped to 1V.
Under Voltage Lockout (UVLO)
The Under Voltage Lockout (UVLO) function ensures the
SG384xG’s supply voltage Vcc will be sufficiently high
before the output stage is enabled. The turn-on and
turn-off threshold voltages are fixed internally at
16V/10V for the SG3842G and at 8.9V/8.1V for the
SG3843G. The hysteresis voltage between turn-on and
turn-off prevents Vcc from being unstable during power
on/off sequencing. At start-up, before the output switch is
enabled, the Vcc hold-up capacitor C
IN
must be charged
up to 16V (SG3842G) through the start-up resistor R
IN,
The ultra-small start-up current of 5uA allows very large
resistance values for the resistor R
IN
to be used, even with
low input voltages. For example, if V
AC
= 90Vrms, R
IN
can be as large as 1.5 M
and still charge the hold-up
capacitor C
IN
. The power dissipation from this larger
resistance R
IN
would then be less than 70mW (0.07W),
even under high line conditions (V
AC
= 240Vrms). After
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