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參數(shù)資料
| 型號： | SG3843GAD |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | BiCMOS Green-Mode PWM Controllers |
| 中文描述： | BiCMOS工藝綠色模式PWM控制器 |
| 文件頁數(shù)： | 14/19頁 |
| 文件大小： | 394K |
| 代理商： | SG3843GAD |
Product Specification
BiCMOS Green-Mode PWM Controllers
SG3842G/ SG3843G
System General Corp.
Version 1.4 ( IRO33.0007.B3)
- 14 -
www.sg.com.tw
Jun.28,2004
Since 4.12V is less than the internal V
comp,H
4.6V voltage
under light-load conditions, the RT/CT oscillator would
take a long time to charge up to 4.6V. In this situation, the
RT/CT oscillator will stop oscillating.
When oscillation stops, there is no PWM output.
Consequently, the energy required to supply the
SG384xG from the auxiliary winding also gets cut off.
This causes the supply voltage Vcc to start dropping. If
the supply voltage Vcc drops below the UVLO voltage, it
will take the SG384xG several hundred milliseconds to
start-up. This delay will cause too much fluctuation to the
output voltage. To avoid this, the SG384xG will
automatically reduce the internal V
comp,H
voltage, turning
the RT/CT oscillator back on when the Vcc supply
voltage falls within 1.5V of the UVLO voltage. In
Burst-mode, the PWM frequency is burst between 0Hz
and the light-load tens of kHz region, not over the full
frequency range. Fig.2 shows the Green-mode frequency
vs. the supply voltage Vcc. The Green-mode frequency is
fixed at 12kHz when Vcc is above 11V. When Vcc is
below 11V and approaching UVLO, the PWM frequency
is gradually increased. This increases the energy supplied
to Vcc, and pulls up the Vcc supply voltage to prevent it
from dropping below UVLO.
These techniques help achieve optimal power savings.
The SG384xG can linearly decrease the PWM frequency
under light-load conditions, and enter into burst-mode
under ultra-light load and zero-load conditions. Linear
frequency reduction and burst-mode enable the SG384xG
to deliver excellent power savings and load regulation.
Fosc-G (Green mode) vs Vcc
0
10
20
30
40
50
9
10
11
12
13
14
Vcc VOLTAGE (V)
F
c
Vcc Over Voltage Protection (OVP)
When the SG384xG’s supply voltage increases to 27V
due to abnormal conditions, such as an open loop from the
photo-coupler, or a short circuit on the output side, the
SG384xG will stop PWM output, to protect the entire
power supply from being damaged.
Noise Immunity
Noise from the current-sense or the control signal can
cause significant pulse-width jitter, particularly under
continuous-mode operation. Slope compensation partially
alleviates this problem, but the designer should be aware
of its presence.
The 384x has a single ground pin. High sink current in the
output therefore cannot be returned separately. Ceramic
bypass capacitors (0.1uF) from Vcc and VREF to ground
will provide low-impedance paths for high-frequency
transients.
For best results, good high-frequency and RF layout
practices should be followed. The designer should avoid
long PCB traces and component leads. The oscillator,
compensation, and filter components should be located
near the 384x. In order to minimize noise interference to
the oscillator, it is recommended that C
T
should never be
less than 1000pF.
Noise caused by the output (pin 6) also causes problems
sometimes. This is because the pin is being pulled below
ground at turn-off by the external parasitic. This is
particularly true when driving a MOSFET. A resistor
series connected from the output (pin 6) to the gate of the
MOSFET will prevent such output noise.
COMP=1.4V
Temperature=25
℃
Drop below UVLO
Fig.2 Green-mode Frequency vs. Supply Voltage Vcc
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