Si2457/34/15/04
6
Rev. 1.3
Table 4. AC Characteristics
(VD = 3.0 to 3.6 V, TA = 0 to 70 °C for F-grade, Fs = 8 kHz, TA = –40 to 85 °C for G-grade)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Sample Rate
Fs
—
8
—
kHz
Clock Input Frequency
FXTL
default
—
4.9152
—
MHz
Clock Input Frequency
FXTL
—27—
MHz
Clock Input Frequency
FXTL
—
32.768
—
kHz
Receive Frequency Response
Low –3 dBFS Corner, FILT = 0
—
5
—
Hz
Receive Frequency Response
Low –3 dBFS Corner, FILT = 1
—
200
—
Hz
Transmit Full Scale Leve
l2VFS
—1.1
—
VPEAK
Receive Full Scale Level
2,3VFS
—1.1
—
VPEAK
DR
ILIM = 0, DCV = 11, MINI = 00
DCR = 0, IL = 100 mA
—80—
dB
DR
ILIM = 0, DCV = 00, MINI = 11
DCR = 0, IL =20mA
—80—
dB
DR
ILIM = 1, DCV = 11, MINI = 00
DCR = 0, IL =50mA
—80—
dB
Transmit Total Harmonic
THD
ILIM = 0, DCV = 11, MINI = 00
DCR = 0, IL = 100 mA
—–72
—
dB
Transmit Total Harmonic
THD
ILIM = 0, DCV = 00, MINI = 11
DCR = 0, IL =20mA
—–78
—
dB
Receive Total Harmonic
THD
ILIM = 0, DCV = 00, MINI = 11
DCR = 0, IL =20mA
—–78
—
dB
Receive Total Harmonic
THD
ILIM = 1,DCV = 11, MINI=00
DCR = 0, IL =50mA
—–78
—
dB
Dynamic Range (Caller ID Mode)
DRCID
VIN = 1 kHz, –13 dBm
—
50
—
dB
Notes:
1. Refer to “AN93: ISOmodem Chipset Family Designer's Guide” for configuring clock input reset strapping.
2. Measured at TIP and RING with 600
3. Receive full scale level produces –0.9 dBFS at DTX.
4. DR = 20 x log |Vin| + 20 x log (rms signal/rms noise). Applies to both transmit and receive paths. Vin = 1 kHz, –3 dBFS.
5. Vin = 1 kHz, –3 dBFS. THD = 20 x log (rms distortion/rms signal).