參數(shù)資料
型號: SI3452A-B01-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 4/36頁
文件大?。?/td> 0K
描述: IC POE CONTROLLER MIDSPAN 40QFN
特色產(chǎn)品: Si3452 Quad High-Voltage Port Controller for PoE and PoE+PSEs
標(biāo)準(zhǔn)包裝: 50
控制器類型: 以太網(wǎng)供電控制器(POE)
接口: I²C
電源電壓: 3 V ~ 3.6 V
電流 - 電源: 14mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 管件
配用: SMARTPSE24-KIT-ND - KIT EVAL REF 24PORT SPI/UART
SI3480MS8-KIT-ND - KIT EVAL 8PORT SI3480/52/SI3500
其它名稱: 336-1831-5
Si3452
12
Rev. 1.3
4. Functional Description
Integrating four independent, high-voltage PSE port interfaces, the Si3452 high-voltage port controller enables an
extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452 provides all of the high-
voltage Power over Ethernet PSE functions.
Each port of the Si3452 integrates all high-voltage PSE controller functions needed for a quad-port PoE design,
including the power MOSFET, efficient current-sensing circuitry, transient voltage surge suppressor, and multiple
detect and disconnect circuits. The external BOM is typically only a single filter capacitor on each high-voltage port.
When a PD device has been properly detected and classified, the port is powered by a –54 V nominal supply with
continuous monitoring of voltage and current for feedback to the host system.
In addition to the required IEEE features, the Si3452 includes many additional features:
Per port current / voltage monitoring and measurement
Support for 1-Event and 2-Event classification algorithms
Start up in shutdown or auto mode
Alternative A (typically used for endpoint systems) or Alternative B (typically used for midspan systems)
detection timing
4.1. Detection
The Si3452 has per-port signature detection that satisfies the IEEE Std 802.3-2005 specifications. However, by
utilizing a 3-point voltage-forced detection method, the Si3452 yields robust recognition of valid and invalid
powered device (PD) signatures, properly identifying signatures often mischaracterized by other detection
techniques.
Figure 4. PSE Sequencing (3-Point Detection Followed by 2-Event Classification and Powerup)
Vport Relative to GND
The detection circuitry performs the function of setting the output voltage on any channel to the proper value for
detection or classification and then measuring the resulting line current.
A typical detection cycle consists of applying 4 V, then 8 V, then 4 V again with the current limit set to 3 mA. The
current is measured after an appropriate settling time. For a valid PD, the detection signature must be compliant
with the detection voltage both increasing and decreasing.
3 point
detection
2 event
classification
Port powerup
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