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參數(shù)資料
型號(hào): SI5338D-A-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 17/44頁(yè)
文件大?。?/td> 0K
描述: IC CLK GEN I2C BUS PROG 24QFN
標(biāo)準(zhǔn)包裝: 490
系列: MultiSynth™
類型: *
PLL:
輸入: CML,HCSL,HSCL,LVDS,LVPECL,晶體
輸出: CMOS,HCSL. HSTL. LVDS. LVPECL. SSTL
電路數(shù): 1
比率 - 輸入:輸出: 1:4
差分 - 輸入:輸出: 是/是
頻率 - 最大: 700MHz
除法器/乘法器: 是/是
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 托盤
Si5338
24
Rev. 1.3
Figure 13. Output Enable Control Registers
3.8. Power Consumption
The Si5338 Power consumption is a function of
Supply voltage
Frequency of output Clocks
Number of output Clocks
Format of output Clocks
Because of internal voltage regulation, the current from
the core VDD is independent of the VDD voltage and
hence the plot shown in Figure 14 can be used to
estimate the VDD core (pins 7 and 24) current.
The current from the output supply voltages can be
estimated from the values provided in Table 3, “DC
Characteristics,” on page 5. To get the most accurate
value
for
VDD
currents,
the
Si5338-EVB
with
Clockbuilder software should be used. To do this, go to
the
“Power”
tab
of
the
Clockbuilder
and
press
“Measure”. In this manner, a specific configuration can
be implemented on the EVB and the actual current for
each supply voltage measured. When doing this it is
critical that the output drivers have the proper load
impedance for the selected format.
When testing for output driver current with HSTL and
SSTL, it is required to have load circuitry as shown in
“AN408: Termination Options for Any-Frequency, Any-
Output Clock Generators and Clock Buffers”. The
Si5338 EVB has layout pads that can be used for this
purpose. When testing for output driver current with
LVPECL the same layout pads can be used to
implement the LVPECL bias resistor of 130
(2.5 V
VDDx) or 200
(3.3 V VDDx). See the schematic in the
Si5338-EVB data sheet and AN408 for additional
information.
230
OEB
0
OEB
1
OEB
2
OEB
3
OEB
All
1
2
3
4
5
6
7
0 = enable
1 = disable
110
0
1
2
3
4
5
6
7
CLK0 OEB
State
114
0
1
2
3
4
5
6
7
CLK1 OEB
State
118
0
1
2
3
4
5
6
7
CLK2 OEB
State
122
0
1
2
3
4
5
6
7
CLK3 OEB
State
00 = disabled tri-state
01 = disabled low
10 = disabled high
11 = always enabled
Bits reserved
Bits used by other functions
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI5338D-A-GMR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 I2C-Program Clk Gen 0.16-710MHz Pin-Ctrl RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5338D-B-GM 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 I2C-PRGRMBL clock generatr 0.16-700MHz RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5338D-B-GMR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 I2C-Program Clk Gen 0.16-710MHz Pin-Ctrl RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5338E-A-GM 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 I2C-PRGRMBL clock generatr 0.16-350MHz RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SI5338E-A-GMR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 I2C-Program Clk Gen 0.16-350MHz Pin-Ctrl RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56