參數(shù)資料
型號(hào)： SI5350C-A-GT
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 6/24頁(yè)
文件大小： 0K
描述： IC CLK GEN PLL BLANK CUST 10MSOP
標(biāo)準(zhǔn)包裝： 50
系列： MultiSynth™
類型： *
PLL： 是
輸入： 晶體
輸出： CMOS
電路數(shù)： 1
比率 - 輸入:輸出： 1:3
差分 - 輸入:輸出： 無/無
頻率 - 最大： 133MHz
除法器/乘法器： 是/無
電源電壓： 2.25 V ~ 3.63 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-MSOP
包裝： 管件
Si5350C
14
Rev. 0.9
4.4.4. Power Down (PDN)
An optional power down control pin allows a full shutdown of the Si5350C to minimize power consumption when its
output clocks are not being used. The Si5350C is in normal operation when the PDN pin is held low and is in power
down mode when held high. Power consumption when the device is in power down mode is indicated in Table 2 on
4.4.5. Loss Of Lock (LOL)
A loss of lock pin (LOL) is available to indicate the status of the synchronous clock outputs. The LOL pin is set to a
low state when the synchronous clock outputs are locked to the clock input (CLKIN). This is the normal operating
state for the synchronous clocks. The LOL pin will go high when the reference clock at the CLKIN input is removed
or if its frequency deviates by more than 2000 ppm from its defined center frequency. In this case, the synchronous
clocks will continue to free-run. An option to disable the synchronous output clocks during an LOL condition (LOL
pin = high) is available. This only affects the clock outputs that were designated as synchronous clock outputs.
4.5. Design Considerations
The Si5350C is a self-contained clock generator that requires very few external components. The following general
guidelines are recommended to ensure optimum performance.
4.5.1. Power Supply Decoupling/Filtering
The Si5350C has built-in power supply filtering circuitry to help keep the number of external components to a
minimum. All that is recommended is one 0.1 F decoupling capacitor per power supply pin. This capacitor should
be mounted as close to the VDD and VDDO pins as possible without using vias.
4.5.2. Power Supply Sequencing
The VDD and VDDOx (i.e., VDDO0, VDDO1, VDDO2, VDDO3) power supply pins have been separated to allow
flexibility in output signal levels. It is important that power is applied to all supply pins (VDD, VDDOx) at the same
time. Unused VDDOx pins should be tied to VDD.
4.5.3. External Crystal
The external crystal should be mounted as close to the pins as possible using short PCB traces. The XA and XB
traces should be kept away from other high-speed signal traces. See “AN551: Crystal Selection Guide” for more
details.
4.5.4. External Crystal Load Capacitors
The Si5350C provides the option of using internal and external crystal load capacitors. If external load capacitors
are used, they should be placed as close to the XA/XB pads as possible. See “AN551: Crystal Selection Guide” for
more details.
4.5.5. Unused Pins
Unused control pins (P0–P3) should be tied to GND.
Unused CLKIN pin should be tied to GND.
Unused XA/XB pins should be left floating. Refer to "2.2. Replacing a Crystal with a Clock" on page 8 when using
XA as a clock input pin.
Unused output pins (CLK0–CLK7) should be left unconnected.
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SI5350C-A-GTR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Dual PLL 133MHz Clk Dual In 3 Outs RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5350C-A-GU 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 AnyRate 2 PLL 125MHz Clk w/Dual In 8 out RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SI5350C-A-GUR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Dual PLL 133MHz Clk Dual In 8 Outs RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5350C-Axxxxx-GM 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Any-Rate, Dual PLL 133MHz Clock with Dual Input, 8 outputs, 20-QFN (customized) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5350C-Axxxxx-GT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Any-Rate, Dual PLL 133MHz Clock with Dual Input, 3 outputs, 10-MSOP (customized) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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