參數(shù)資料
型號: SIP2210DMP-QU-E3
廠商: VISHAY SILICONIX
元件分類: 固定正電壓多路輸出LDO穩(wěn)壓器
英文描述: DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10
封裝: 3 X 3 MM, LEAD FREE, MLP-10
文件頁數(shù): 2/11頁
文件大?。?/td> 218K
代理商: SIP2210DMP-QU-E3
www.vishay.com
10
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
Vishay Siliconix
SiP2210
DETAILED OPERATION
The SiP2210 is a low dropout, low quiescent current
monolithic dual linear regulator, with power-on reset and
open drain driver output features. With output voltage range
from 1.25 V to 5 V, the first regulator can source 150 mA and
the second regulator can source 300 mA. The open drain
driver has the capability to drive LED’s for backlighting
applications.
VIN
VIN is the input supply pin for both LDO’s. The bypass
capacitor for this pin is not critical as long as the input supply
has low enough source impedance. For practical circuits, a
1.0 F or larger ceramic capacitor is recommended. When
the source impedance is not low enough and/or the source is
several inches from the SiP2210, then a larger input bypass
capacitor is needed. When the source impedance, wire and
trace impedance are unknown, it is recommended that an
input bypass capacitor be used of a value that is equal to or
greater than the output capacitor.
VOUT1,2 (LDO Outputs)
The VOUT is the output voltage of the regulator. Connect a
bypass capacitor from VOUTx to ground. The output capacitor
can be any value from 1.0 F to 10.0 F. A ceramic capacitor
with X5R or X7R dielectric type is recommended for best
output noise, line transient, and load transient performance.
Enable
The EN1 and EN2 pins control the turning on and off of their
respective regulators in the SiP2210. VOUT of both outputs
are guaranteed to be on when the Enable pin voltage is equal
or greater than 1.8 V. VOUT is guaranteed to be off when the
Enable pin voltage equals or is less than 0.6 V. To
automatically turn on VOUT whenever the input is applied, tie
the Enable pin to VIN.
ERROR Flag Output (ERR)
The ERR is an open drain output that goes low when VOUT2
is less than 5 % of its nominal value. As with any open drain
output, an external pull up resistor is needed. The ERR pin is
disconnected if not used.
OPEN-Drain Driver (DRV)
The SW pin a logic level input put that controls the DRV pin.
The switch pin is an active high input and should not be left
floating. The drive pin is an open drain output able to sink
150 mA of current.
Bypass Capacitor
For low noise application and/or increase in power supply
rejection ration (PSRR) connect a high frequency ceramic
capacitor from BP to ground. A 0.01 F X5R or X7R ceramic
capacitor is recommended.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73441.
相關(guān)PDF資料
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SIP2210DMP-QV-E3 DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10
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