SiP2213

Vishay Siliconix

New Product

Document Number: 73190

S-50922—Rev. C, 09-May-05

www.vishay.com

9

DETAILED OPERATION

The SiP2213 is a low drop out, low quiescent current

monolithic dual linear regulator, with power-on reset and open

drain driver output features. With output voltage range from

1.25 V to 5 V the first regulator can source 150 mA and the

second regulator can source 300 mA. The regulators are

sequentially turned on with the 150 mA regulator turned on

first and then the 300-mA regulator. The open drain driver has

the capability to drive LED’s for backlighting applications.

V

IN

V

IN

is the input supply pin for both LDO’s. The bypass

capacitor for this pin is not critical as long as the input supply

has low enough source impedance. For practical circuits, a

1.0 F or larger ceramic capacitor is recommended. When the

source impedance is not low enough and/or the source is

several inches from the SiP2213, then a larger input bypass

capacitor is needed. When the source impedance, wire and

trace impedance are unknown, it is recommended that an

input bypass capacitor be used of a value that is equal to or

greater than the output capacitor.

V

OUT1, 2

(LDO Outputs)

The V

OUT

is the output voltage of the regulator. Connect a

bypass capacitor from V

OUTx

to ground. The output capacitor

can be any value from 1.0 F to 10.0 F. A ceramic capacitor

with X5R or X7R dielectric type is recommended for best

output noise, line transient, and load transient performance.

Enable

The Enable pin controls the turning on and off of both

regulators of the SiP2213. V

OUT

of both outputs are

guaranteed to be on when the Enable pin voltage is equal or

greater than 1.8 V; the regulators are sequentially turned on

with the 150 mA regulator turned on first and then the 300mA

regulator. V

OUT

is guaranteed to be off when the Enable pin

voltage equals or is less than 0.6 V. To automatically turn on

V

OUT

whenever the Input is applied, tie the Enable pin to V

IN

.

Power-On Reset (POR)

The POR is an open drain output that goes low when V

OUT2

is less than 5% of its nominal value. As with any open drain

output, an external pull up resistor is needed. The POR pin is

disconnected if not used.

SET

When a capacitor is connected from SET to GROUND, the

POR signal transition from low to high is delayed. This delayed

POR signal can be used as the power-on reset signal for the

application system. To set the POR delay time refer to the POR

Delay curve to determine the capacitor value.

The Set pin should be an open circuit if not used.

OPEN-Drain Driver (DRV)

The SW pin a logic level input put that controls the DRV pin.

The switch pin is an active high input and should not be left

floating. The drive pin is an open drain output able to sink

150 mA of current.

Bypass Capacitor

For low noise application and/or increase in power supply

rejection ration (PSRR) connect a high frequency ceramic

capacitor from BP to ground. A 0.01- F X5R or X7R ceramic

capacitor is recommended.

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Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see