參數(shù)資料
型號: SL15100ZI
廠商: Silicon Laboratories Inc
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: IC CLOCK SSCG 1PLL 2CH 8TSSOP
標(biāo)準(zhǔn)包裝: 100
系列: EProClock®
類型: *
PLL: 帶旁路
輸入: 時(shí)鐘,晶體
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 200MHz
除法器/乘法器: 是/無
電源電壓: 2.25 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
Rev 1.8, August 10, 2007
Page 12 of 16
SL15100
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ2
CLKIN=SSCLK=66MHz, 2%Spread
REFCLK=Off
-
125
160
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ3
CLKIN=SSCLK=33MHz, 2%Spread
REFCLK=Off
-
125
160
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ4
CLKIN=SSCLK=166MHz, 2%Spread
REFCLK=On
-
145
185
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ5
CLKIN=SSCLK=66MHz, 2%Spread
REFCLK=On
-
125
160
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 7)
CCJ6
CLKIN=SSCLK=33MHz, 2%Spread
REFCLK=On
-
215
280
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 6)
CCJ7
CLKIN=SSCLK=166MHz, 2%Spread
REFCLK=On
-
105
130
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 6)
CCJ8
CLKIN=SSCLK=66MHz, 2%Spread
REFCLK=On
-
125
160
ps
Cycle-to-Cycle Jitter
(SSCLK – Pin 6)
CCJ9
CLKIN=SSCLK=33MHz, 2%Spread
REFCLK=On
-
165
220
ps
Power-down Time
tPD
Time from PD# falling edge to Hi-Z at
outputs (Asynchronous)
-
180
350
ns
Power-up Time
(Crystal or Resonator)
tPU1
Time from PD# rising edge to valid
frequency at outputs (Asynchronous)
-
3.5
5.0
ms
Power-up Time
(Clock)
tPU2
Time from PD# rising edge to valid
frequency at outputs (Asynchronous)
-
2.0
3.0
ms
Output Enable Time
tOE
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
-
180
350
ns
Output Disable Time
tOD
Time from OE falling edge to Hi-Z at
outputs (Asynchronous)
-
180
350
ns
Spread Percent Range
SPR
SSCLK-1/2
0.25
-
5.0
%
Spread Percent Variation
ΔSS%
Variation of programmed Spread %
-20
-
20
%
Modulation Frequency
FMOD
Programmable, 31.5 kHz standard
30
31.5
120
kHz
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