參數(shù)資料
型號： SL28504BZC-1T
廠商： Silicon Laboratories Inc
文件頁數(shù)： 25/31頁
文件大小： 0K
描述： IC CLOCK GEN EAGLELAKE 56TSSOP
標準包裝： 2,000
系列： *
SL28504
...................... DOC #: SP-AP-0052 (Rev. AA) Page 31 of 31
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Document History Page
Document Title: SL28504 Clock Generator for IntelEaglelake Chipset
REV.
ECR#
Issue Date
Orig. of
Change
Description of Change
1.0
10/5/07
BSHEN
Initial Release
1.1
10/19/07
BSHEN
Add SRC1 to pin 17/18. and tri-level trigger at 24.576M
1.2
01/21/08
BSHEN
1. Change Revision ID Byte7[7:4] to be 0001
2. Updated block diagram
3. Change Byte10[6:2] and Byte11[4] to be reserved
1.3
05/26/09
BSHEN
1. Update TSSOP64 package dimension to compliant to SLI-POD spec
1.4
06/24/09
BSHEN
1. Correct the pin out with CLK request pin
2. Correct the CLK request register
3. Remove QFN package,
AA
1576
04/28/10
BSHEN
1. Updated Industrial ordering information
2. Correct VDD_IO pin description
3. Updated document format for ISO compliance.
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相關代理商/技術參數(shù)
參數(shù)描述
SL28504BZC-2 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28504BZC-2T 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28504BZCT 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28504BZI 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
SL28504BZI-2 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Syst Clock Intel Eaglake RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
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