參數(shù)資料
型號(hào): SL28779ELIT
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 15/22頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK CALPELLA CK505 32QFN
標(biāo)準(zhǔn)包裝: 2,500
系列: EProClock®
類(lèi)型: 時(shí)鐘/頻率發(fā)生器,多路復(fù)用器
PLL:
主要目的: Intel CPU 服務(wù)器
輸入: 晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:9
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 133MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
SL28779
DOC#: SP-AP-0066 (Rev. AA)
Page 22 of 22
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Document History Page
Document Title: SL28779 PC EProClock Generator for Intel Calpella Chipset
DOC#: SP-AP-0066 (Rev. AA)
REV.
ECR# Issue Date
Orig. of
Change
Description of Change
1.0
10/9/08
JMA
Initial Release
1.1
10/23/08
JMA
1. Changed operating temperature to 0-85C
2. Re-aligned ordering part number description
1.2
1/27/09
JMA
1. Updated Rev. ID
2. Uddated definition of Byte 6 bit 5 and 3
3. Updated Byte 13 and single-ended slew rate table
4. Udated Byte 14
5. Updated Feature description
6. Added less than symbol in power consumption value
7. Updated ordering part number
8. Changed package information
9. Changed Wireless Friendly Mode to 111
1.3
3/16/09
JMA
1. Added PC EProClock Programmed Technology in Feature section
2. Updated Block Diagram
3. Updated 27MHz slew rate measurement window
4. Updated power consumption
1.4
5/18/09
JMA
1. Updated Package information removed punch version with saw version
2. Updated TPeriod at 100MHz for CPU clocks
3. Updated Revision ID
4. Added Power down Spec
5. Added PC EProClock Technology description
6. Added CPU Skew
7. Added 27M_OE# information
8. Removed CPU_STP# information
1.5
6/3/09
JMA
1. Update Revision ID
2. Removed 3-bit differential slew rate
3. Removed 0.1s from CPU duty cycle spec
4. Changed SATA PLL2 to PLL4
5. Updated IDD measurement condition
AA
1458
01/05/10
JMA
1. Added Note in package diagram
2. Updated text content
3. Added information on trace length in Figure 8
4. Removed CPU Driven Figures
5. Updated VDD_IO spec to 4.6Vmaximum value
6. Edited CK_PWRGD to CKPWRGD
7. Removed Preliminary word
8. Updated MIL-Std to JEDEC standard
9. Updated revision to be ISO compliant
10. Added CLKIN feature
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