參數(shù)資料
型號(hào): SL28SRC02BZIT
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 7/14頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK PCIE GEN3/2 DIF 20TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: *
PLL:
輸入: 時(shí)鐘,晶體
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 100MHz
除法器/乘法器: 無(wú)/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
SL28SRC02
............................................... Document #: 0.2 Page 2 of 14
Pin Definitions
Serial Data Interface
To enhance the flexibility and function of the clock synthesizer,
a two-signal serial interface is provided. Through the Serial
Data Interface, various device functions, such as individual
clock output buffers are individually enabled or disabled. The
registers associated with the Serial Data Interface initialize to
their default setting at power-up. The use of this interface is
optional. Clock device register changes are normally made at
system initialization, if any are required. The interface cannot
be used during system operation for power management
functions.
Data Protocol
The clock driver serial protocol accepts byte write, byte read,
block write, and block read operations from the controller. For
block write/read operation, Access the bytes in sequential
order from lowest to highest (most significant bit first) with the
ability to stop after any complete byte is transferred. For byte
write and byte read operations, the system controller can
access individually indexed bytes. The offset of the indexed
byte is encoded in the command code described in Table 1.
The block write and block read protocol is outlined in Table 2
while Table 3 outlines byte write and byte read protocol. The
slave receiver address is 11010010 (D2h)
.
Pin No.
Name
Type
Description
1
VDD
PWR 3.3V Power supply
2
SDATA
I/O
SMBus compatible SDATA.
3
SCLK
I
SMBus compatible SCLOCK.
4
VDD
PWR 3.3V power supply
5
VSS
GND
Ground
6
VDD
PWR 3.3V power supply
7
VSS
GND
Ground
8
SRC1
O, DIF 100 MHz Differential serial reference clocks.
9
SRC1#
O, DIF 100 MHz Differential serial reference clocks.
10
VSS
GND
Ground
11
SRC2
O, DIF 100 MHz Differential serial reference clocks.
12
SRC2#
O, DIF 100 MHz Differential serial reference clocks.
13
VDD
PWR 3.3V power supply
14
VDD
PWR 3.3V power supply
15
VSS
GND
Ground
16
VDD
PWR 3.3V power supply
17
SSON
I
3.3V LVTTL input for enabling spread spectrum clock
0 = Disable, 1 = Enable (-0.5% SS)
External 10K ohm pull-up or pull-down resistor required
18
VSS
GND
Ground
19
XOUT
O, SE 14.318 MHz Crystal output.
20
XIN
I
14.318 MHz Crystal input.
Table 1. Command Code Definition
Bit
Description
7
0 = Block read or block write operation, 1 = Byte read or byte write operation
(6:0)
Byte offset for byte read or byte write operation. For block read or block write operations, these bits should be '0000000'
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SL28SRC02BZITR 制造商:Silicon Laboratories Inc 功能描述:
SL28SRC04BZC 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 4PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28SRC04BZCT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 4PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28SRC04BZI 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28SRC04BZIT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56